1# SPDX-License-Identifier: GPL-2.0-only 2if ARCH_IXP4XX 3 4menu "Intel IXP4xx Implementation Options" 5 6comment "IXP4xx Platforms" 7 8config MACH_IXP4XX_OF 9 bool 10 prompt "Device Tree IXP4xx boards" 11 default y 12 select ARM_APPENDED_DTB # Old Redboot bootloaders deployed 13 select I2C 14 select I2C_IOP3XX 15 select PCI 16 select USE_OF 17 help 18 Say 'Y' here to support Device Tree-based IXP4xx platforms. 19 20config MACH_GATEWAY7001 21 bool "Gateway 7001" 22 depends on IXP4XX_PCI_LEGACY 23 help 24 Say 'Y' here if you want your kernel to support Gateway's 25 7001 Access Point. For more information on this platform, 26 see http://openwrt.org 27 28config MACH_GORAMO_MLR 29 bool "GORAMO Multi Link Router" 30 depends on IXP4XX_PCI_LEGACY 31 help 32 Say 'Y' here if you want your kernel to support GORAMO 33 MultiLink router. 34 35config ARCH_PRPMC1100 36 bool "PrPMC1100" 37 help 38 Say 'Y' here if you want your kernel to support the Motorola 39 PrPCM1100 Processor Mezanine Module. For more information on 40 this platform, see <file:Documentation/arm/ixp4xx.rst>. 41 42comment "IXP4xx Options" 43 44config IXP4XX_PCI_LEGACY 45 bool "IXP4xx legacy PCI driver support" 46 depends on PCI 47 help 48 Selects legacy PCI driver. 49 Not recommended for new development. 50 51config IXP4XX_INDIRECT_PCI 52 bool "Use indirect PCI memory access" 53 depends on IXP4XX_PCI_LEGACY 54 help 55 IXP4xx provides two methods of accessing PCI memory space: 56 57 1) A direct mapped window from 0x48000000 to 0x4BFFFFFF (64MB). 58 To access PCI via this space, we simply ioremap() the BAR 59 into the kernel and we can use the standard read[bwl]/write[bwl] 60 macros. This is the preferred method due to speed but it 61 limits the system to just 64MB of PCI memory. This can be 62 problematic if using video cards and other memory-heavy devices. 63 64 2) If > 64MB of memory space is required, the IXP4xx can be 65 configured to use indirect registers to access the whole PCI 66 memory space. This currently allows for up to 1 GB (0x10000000 67 to 0x4FFFFFFF) of memory on the bus. The disadvantage of this 68 is that every PCI access requires three local register accesses 69 plus a spinlock, but in some cases the performance hit is 70 acceptable. In addition, you cannot mmap() PCI devices in this 71 case due to the indirect nature of the PCI window. 72 73 By default, the direct method is used. Choose this option if you 74 need to use the indirect method instead. If you don't know 75 what you need, leave this option unselected. 76 77endmenu 78 79endif 80