1if ARCH_IXP4XX 2 3config ARCH_SUPPORTS_BIG_ENDIAN 4 bool 5 default y 6 7menu "Intel IXP4xx Implementation Options" 8 9comment "IXP4xx Platforms" 10 11config MACH_NSLU2 12 bool 13 prompt "Linksys NSLU2" 14 select PCI 15 help 16 Say 'Y' here if you want your kernel to support Linksys's 17 NSLU2 NAS device. For more information on this platform, 18 see http://www.nslu2-linux.org 19 20config MACH_AVILA 21 bool "Avila" 22 select PCI 23 help 24 Say 'Y' here if you want your kernel to support the Gateworks 25 Avila Network Platform. For more information on this platform, 26 see <file:Documentation/arm/IXP4xx>. 27 28config MACH_LOFT 29 bool "Loft" 30 depends on MACH_AVILA 31 help 32 Say 'Y' here if you want your kernel to support the Giant 33 Shoulder Inc Loft board (a minor variation on the standard 34 Gateworks Avila Network Platform). 35 36config ARCH_ADI_COYOTE 37 bool "Coyote" 38 select PCI 39 help 40 Say 'Y' here if you want your kernel to support the ADI 41 Engineering Coyote Gateway Reference Platform. For more 42 information on this platform, see <file:Documentation/arm/IXP4xx>. 43 44config ARCH_IXDP425 45 bool "IXDP425" 46 help 47 Say 'Y' here if you want your kernel to support Intel's 48 IXDP425 Development Platform (Also known as Richfield). 49 For more information on this platform, see <file:Documentation/arm/IXP4xx>. 50 51config MACH_IXDPG425 52 bool "IXDPG425" 53 help 54 Say 'Y' here if you want your kernel to support Intel's 55 IXDPG425 Development Platform (Also known as Montajade). 56 For more information on this platform, see <file:Documentation/arm/IXP4xx>. 57 58config MACH_IXDP465 59 bool "IXDP465" 60 help 61 Say 'Y' here if you want your kernel to support Intel's 62 IXDP465 Development Platform (Also known as BMP). 63 For more information on this platform, see <file:Documentation/arm/IXP4xx>. 64 65config MACH_KIXRP435 66 bool "KIXRP435" 67 help 68 Say 'Y' here if you want your kernel to support Intel's 69 KIXRP435 Reference Platform. 70 For more information on this platform, see <file:Documentation/arm/IXP4xx>. 71 72# 73# IXCDP1100 is the exact same HW as IXDP425, but with a different machine 74# number from the bootloader due to marketing monkeys, so we just enable it 75# by default if IXDP425 is enabled. 76# 77config ARCH_IXCDP1100 78 bool 79 depends on ARCH_IXDP425 80 default y 81 82config ARCH_PRPMC1100 83 bool "PrPMC1100" 84 help 85 Say 'Y' here if you want your kernel to support the Motorola 86 PrPCM1100 Processor Mezanine Module. For more information on 87 this platform, see <file:Documentation/arm/IXP4xx>. 88 89config MACH_NAS100D 90 bool 91 prompt "NAS100D" 92 select PCI 93 help 94 Say 'Y' here if you want your kernel to support Iomega's 95 NAS 100d device. For more information on this platform, 96 see http://www.nslu2-linux.org/wiki/NAS100d/HomePage 97 98# 99# Avila and IXDP share the same source for now. Will change in future 100# 101config ARCH_IXDP4XX 102 bool 103 depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435 104 default y 105 106# 107# Certain registers and IRQs are only enabled if supporting IXP465 CPUs 108# 109config CPU_IXP46X 110 bool 111 depends on MACH_IXDP465 112 default y 113 114config CPU_IXP43X 115 bool 116 depends on MACH_KIXRP435 117 default y 118 119config MACH_GTWX5715 120 bool "Gemtek WX5715 (Linksys WRV54G)" 121 depends on ARCH_IXP4XX 122 select PCI 123 help 124 This board is currently inside the Linksys WRV54G Gateways. 125 126 IXP425 - 266mhz 127 32mb SDRAM 128 8mb Flash 129 miniPCI slot 0 does not have a card connector soldered to the board 130 miniPCI slot 1 has an ISL3880 802.11g card (Prism54) 131 npe0 is connected to a Kendin KS8995M Switch (4 ports) 132 npe1 is the "wan" port 133 "Console" UART is available on J11 as console 134 "High Speed" UART is n/c (as far as I can tell) 135 20 Pin ARM/Xscale JTAG interface on J2 136 137comment "IXP4xx Options" 138 139config DMABOUNCE 140 bool 141 default y 142 depends on PCI 143 144config IXP4XX_INDIRECT_PCI 145 bool "Use indirect PCI memory access" 146 depends on PCI 147 help 148 IXP4xx provides two methods of accessing PCI memory space: 149 150 1) A direct mapped window from 0x48000000 to 0x4bffffff (64MB). 151 To access PCI via this space, we simply ioremap() the BAR 152 into the kernel and we can use the standard read[bwl]/write[bwl] 153 macros. This is the preferred method due to speed but it 154 limits the system to just 64MB of PCI memory. This can be 155 problematic if using video cards and other memory-heavy devices. 156 157 2) If > 64MB of memory space is required, the IXP4xx can be 158 configured to use indirect registers to access PCI This allows 159 for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 160 The disadvantage of this is that every PCI access requires 161 three local register accesses plus a spinlock, but in some 162 cases the performance hit is acceptable. In addition, you cannot 163 mmap() PCI devices in this case due to the indirect nature 164 of the PCI window. 165 166 By default, the direct method is used. Choose this option if you 167 need to use the indirect method instead. If you don't know 168 what you need, leave this option unselected. 169 170endmenu 171 172endif 173