xref: /openbmc/linux/arch/arm/mach-imx/pm-imx7ulp.c (revision de70d0e9)
1de70d0e9SA.s. Dong // SPDX-License-Identifier: GPL-2.0+
2de70d0e9SA.s. Dong /*
3de70d0e9SA.s. Dong  * Copyright (C) 2016 Freescale Semiconductor, Inc.
4de70d0e9SA.s. Dong  * Copyright 2017-2018 NXP
5de70d0e9SA.s. Dong  *   Author: Dong Aisheng <aisheng.dong@nxp.com>
6de70d0e9SA.s. Dong  */
7de70d0e9SA.s. Dong 
8de70d0e9SA.s. Dong #include <linux/io.h>
9de70d0e9SA.s. Dong #include <linux/of.h>
10de70d0e9SA.s. Dong #include <linux/of_address.h>
11de70d0e9SA.s. Dong 
12de70d0e9SA.s. Dong #define SMC_PMCTRL		0x10
13de70d0e9SA.s. Dong #define BP_PMCTRL_PSTOPO        16
14de70d0e9SA.s. Dong #define PSTOPO_PSTOP3		0x3
15de70d0e9SA.s. Dong 
16de70d0e9SA.s. Dong void __init imx7ulp_pm_init(void)
17de70d0e9SA.s. Dong {
18de70d0e9SA.s. Dong 	struct device_node *np;
19de70d0e9SA.s. Dong 	void __iomem *smc1_base;
20de70d0e9SA.s. Dong 
21de70d0e9SA.s. Dong 	np = of_find_compatible_node(NULL, NULL, "fsl,imx7ulp-smc1");
22de70d0e9SA.s. Dong 	smc1_base = of_iomap(np, 0);
23de70d0e9SA.s. Dong 	WARN_ON(!smc1_base);
24de70d0e9SA.s. Dong 
25de70d0e9SA.s. Dong 	/* Partial Stop mode 3 with system/bus clock enabled */
26de70d0e9SA.s. Dong 	writel_relaxed(PSTOPO_PSTOP3 << BP_PMCTRL_PSTOPO,
27de70d0e9SA.s. Dong 		       smc1_base + SMC_PMCTRL);
28de70d0e9SA.s. Dong 	iounmap(smc1_base);
29de70d0e9SA.s. Dong }
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