xref: /openbmc/linux/arch/arm/mach-imx/platsmp.c (revision 9d749629)
1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  * Copyright 2011 Linaro Ltd.
4  *
5  * The code contained herein is licensed under the GNU General Public
6  * License. You may obtain a copy of the GNU General Public License
7  * Version 2 or later at the following locations:
8  *
9  * http://www.opensource.org/licenses/gpl-license.html
10  * http://www.gnu.org/copyleft/gpl.html
11  */
12 
13 #include <linux/init.h>
14 #include <linux/smp.h>
15 #include <asm/page.h>
16 #include <asm/smp_scu.h>
17 #include <asm/hardware/gic.h>
18 #include <asm/mach/map.h>
19 
20 #include "common.h"
21 #include "hardware.h"
22 
23 static void __iomem *scu_base;
24 
25 static struct map_desc scu_io_desc __initdata = {
26 	/* .virtual and .pfn are run-time assigned */
27 	.length		= SZ_4K,
28 	.type		= MT_DEVICE,
29 };
30 
31 void __init imx_scu_map_io(void)
32 {
33 	unsigned long base;
34 
35 	/* Get SCU base */
36 	asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
37 
38 	scu_io_desc.virtual = IMX_IO_P2V(base);
39 	scu_io_desc.pfn = __phys_to_pfn(base);
40 	iotable_init(&scu_io_desc, 1);
41 
42 	scu_base = IMX_IO_ADDRESS(base);
43 }
44 
45 static void __cpuinit imx_secondary_init(unsigned int cpu)
46 {
47 	/*
48 	 * if any interrupts are already enabled for the primary
49 	 * core (e.g. timer irq), then they will not have been enabled
50 	 * for us: do so
51 	 */
52 	gic_secondary_init(0);
53 }
54 
55 static int __cpuinit imx_boot_secondary(unsigned int cpu, struct task_struct *idle)
56 {
57 	imx_set_cpu_jump(cpu, v7_secondary_startup);
58 	imx_enable_cpu(cpu, true);
59 	return 0;
60 }
61 
62 /*
63  * Initialise the CPU possible map early - this describes the CPUs
64  * which may be present or become present in the system.
65  */
66 static void __init imx_smp_init_cpus(void)
67 {
68 	int i, ncores;
69 
70 	ncores = scu_get_core_count(scu_base);
71 
72 	for (i = 0; i < ncores; i++)
73 		set_cpu_possible(i, true);
74 
75 	set_smp_cross_call(gic_raise_softirq);
76 }
77 
78 void imx_smp_prepare(void)
79 {
80 	scu_enable(scu_base);
81 }
82 
83 static void __init imx_smp_prepare_cpus(unsigned int max_cpus)
84 {
85 	imx_smp_prepare();
86 }
87 
88 struct smp_operations  imx_smp_ops __initdata = {
89 	.smp_init_cpus		= imx_smp_init_cpus,
90 	.smp_prepare_cpus	= imx_smp_prepare_cpus,
91 	.smp_secondary_init	= imx_secondary_init,
92 	.smp_boot_secondary	= imx_boot_secondary,
93 #ifdef CONFIG_HOTPLUG_CPU
94 	.cpu_die		= imx_cpu_die,
95 	.cpu_kill		= imx_cpu_kill,
96 #endif
97 };
98