1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright 2004-2007, 2010-2015 Freescale Semiconductor, Inc. 4 * Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de) 5 */ 6 7 #ifndef __ASM_ARCH_MXC_H__ 8 #define __ASM_ARCH_MXC_H__ 9 10 #include <linux/types.h> 11 12 #ifndef __ASM_ARCH_MXC_HARDWARE_H__ 13 #error "Do not include directly." 14 #endif 15 16 #define MXC_CPU_MX1 1 17 #define MXC_CPU_MX21 21 18 #define MXC_CPU_MX25 25 19 #define MXC_CPU_MX27 27 20 #define MXC_CPU_MX31 31 21 #define MXC_CPU_MX35 35 22 #define MXC_CPU_MX51 51 23 #define MXC_CPU_MX53 53 24 #define MXC_CPU_IMX6SL 0x60 25 #define MXC_CPU_IMX6DL 0x61 26 #define MXC_CPU_IMX6SX 0x62 27 #define MXC_CPU_IMX6Q 0x63 28 #define MXC_CPU_IMX6UL 0x64 29 #define MXC_CPU_IMX6ULL 0x65 30 /* virtual cpu id for i.mx6ulz */ 31 #define MXC_CPU_IMX6ULZ 0x6b 32 #define MXC_CPU_IMX6SLL 0x67 33 #define MXC_CPU_IMX7D 0x72 34 #define MXC_CPU_IMX7ULP 0xff 35 36 #define MXC_CPU_VFx10 0x010 37 #define MXC_CPU_VF500 0x500 38 #define MXC_CPU_VF510 (MXC_CPU_VF500 | MXC_CPU_VFx10) 39 #define MXC_CPU_VF600 0x600 40 #define MXC_CPU_VF610 (MXC_CPU_VF600 | MXC_CPU_VFx10) 41 42 #define IMX_DDR_TYPE_LPDDR2 1 43 44 #ifndef __ASSEMBLY__ 45 extern unsigned int __mxc_cpu_type; 46 47 #ifdef CONFIG_SOC_IMX6SL 48 static inline bool cpu_is_imx6sl(void) 49 { 50 return __mxc_cpu_type == MXC_CPU_IMX6SL; 51 } 52 #else 53 static inline bool cpu_is_imx6sl(void) 54 { 55 return false; 56 } 57 #endif 58 59 static inline bool cpu_is_imx6dl(void) 60 { 61 return __mxc_cpu_type == MXC_CPU_IMX6DL; 62 } 63 64 static inline bool cpu_is_imx6sx(void) 65 { 66 return __mxc_cpu_type == MXC_CPU_IMX6SX; 67 } 68 69 static inline bool cpu_is_imx6ul(void) 70 { 71 return __mxc_cpu_type == MXC_CPU_IMX6UL; 72 } 73 74 static inline bool cpu_is_imx6ull(void) 75 { 76 return __mxc_cpu_type == MXC_CPU_IMX6ULL; 77 } 78 79 static inline bool cpu_is_imx6ulz(void) 80 { 81 return __mxc_cpu_type == MXC_CPU_IMX6ULZ; 82 } 83 84 static inline bool cpu_is_imx6sll(void) 85 { 86 return __mxc_cpu_type == MXC_CPU_IMX6SLL; 87 } 88 89 static inline bool cpu_is_imx6q(void) 90 { 91 return __mxc_cpu_type == MXC_CPU_IMX6Q; 92 } 93 94 static inline bool cpu_is_imx7d(void) 95 { 96 return __mxc_cpu_type == MXC_CPU_IMX7D; 97 } 98 99 struct cpu_op { 100 u32 cpu_rate; 101 }; 102 103 int tzic_enable_wake(void); 104 105 extern struct cpu_op *(*get_cpu_op)(int *op); 106 #endif 107 108 #define imx_readl readl_relaxed 109 #define imx_readw readw_relaxed 110 #define imx_writel writel_relaxed 111 #define imx_writew writew_relaxed 112 113 #endif /* __ASM_ARCH_MXC_H__ */ 114