xref: /openbmc/linux/arch/arm/mach-imx/mm-imx3.c (revision 0c6dfa75)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  *  Copyright (C) 1999,2000 Arm Limited
4  *  Copyright (C) 2000 Deep Blue Solutions Ltd
5  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
6  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
7  *    - add MX31 specific definitions
8  */
9 
10 #include <linux/mm.h>
11 #include <linux/init.h>
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/of_address.h>
15 
16 #include <asm/system_misc.h>
17 #include <asm/hardware/cache-l2x0.h>
18 #include <asm/mach/map.h>
19 
20 #include "common.h"
21 #include "crmregs-imx3.h"
22 #include "hardware.h"
23 
24 void __iomem *mx3_ccm_base;
25 
26 static void imx3_idle(void)
27 {
28 	unsigned long reg = 0;
29 
30 	__asm__ __volatile__(
31 		/* disable I and D cache */
32 		"mrc p15, 0, %0, c1, c0, 0\n"
33 		"bic %0, %0, #0x00001000\n"
34 		"bic %0, %0, #0x00000004\n"
35 		"mcr p15, 0, %0, c1, c0, 0\n"
36 		/* invalidate I cache */
37 		"mov %0, #0\n"
38 		"mcr p15, 0, %0, c7, c5, 0\n"
39 		/* clear and invalidate D cache */
40 		"mov %0, #0\n"
41 		"mcr p15, 0, %0, c7, c14, 0\n"
42 		/* WFI */
43 		"mov %0, #0\n"
44 		"mcr p15, 0, %0, c7, c0, 4\n"
45 		"nop\n" "nop\n" "nop\n" "nop\n"
46 		"nop\n" "nop\n" "nop\n"
47 		/* enable I and D cache */
48 		"mrc p15, 0, %0, c1, c0, 0\n"
49 		"orr %0, %0, #0x00001000\n"
50 		"orr %0, %0, #0x00000004\n"
51 		"mcr p15, 0, %0, c1, c0, 0\n"
52 		: "=r" (reg));
53 }
54 
55 static void __iomem *imx3_ioremap_caller(phys_addr_t phys_addr, size_t size,
56 					 unsigned int mtype, void *caller)
57 {
58 	if (mtype == MT_DEVICE) {
59 		/*
60 		 * Access all peripherals below 0x80000000 as nonshared device
61 		 * on mx3, but leave l2cc alone.  Otherwise cache corruptions
62 		 * can occur.
63 		 */
64 		if (phys_addr < 0x80000000 &&
65 				!addr_in_module(phys_addr, MX3x_L2CC))
66 			mtype = MT_DEVICE_NONSHARED;
67 	}
68 
69 	return __arm_ioremap_caller(phys_addr, size, mtype, caller);
70 }
71 
72 #ifdef CONFIG_SOC_IMX31
73 static struct map_desc mx31_io_desc[] __initdata = {
74 	imx_map_entry(MX31, X_MEMC, MT_DEVICE),
75 	imx_map_entry(MX31, AVIC, MT_DEVICE_NONSHARED),
76 	imx_map_entry(MX31, AIPS1, MT_DEVICE_NONSHARED),
77 	imx_map_entry(MX31, AIPS2, MT_DEVICE_NONSHARED),
78 	imx_map_entry(MX31, SPBA0, MT_DEVICE_NONSHARED),
79 };
80 
81 /*
82  * This function initializes the memory map. It is called during the
83  * system startup to create static physical to virtual memory mappings
84  * for the IO modules.
85  */
86 void __init mx31_map_io(void)
87 {
88 	iotable_init(mx31_io_desc, ARRAY_SIZE(mx31_io_desc));
89 }
90 
91 static void imx31_idle(void)
92 {
93 	int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR);
94 	reg &= ~MXC_CCM_CCMR_LPM_MASK;
95 	imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR);
96 
97 	imx3_idle();
98 }
99 
100 void __init imx31_init_early(void)
101 {
102 	struct device_node *np;
103 
104 	mxc_set_cpu_type(MXC_CPU_MX31);
105 	arch_ioremap_caller = imx3_ioremap_caller;
106 	arm_pm_idle = imx31_idle;
107 	np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm");
108 	mx3_ccm_base = of_iomap(np, 0);
109 	BUG_ON(!mx3_ccm_base);
110 }
111 #endif /* ifdef CONFIG_SOC_IMX31 */
112 
113 #ifdef CONFIG_SOC_IMX35
114 static struct map_desc mx35_io_desc[] __initdata = {
115 	imx_map_entry(MX35, X_MEMC, MT_DEVICE),
116 	imx_map_entry(MX35, AVIC, MT_DEVICE_NONSHARED),
117 	imx_map_entry(MX35, AIPS1, MT_DEVICE_NONSHARED),
118 	imx_map_entry(MX35, AIPS2, MT_DEVICE_NONSHARED),
119 	imx_map_entry(MX35, SPBA0, MT_DEVICE_NONSHARED),
120 };
121 
122 void __init mx35_map_io(void)
123 {
124 	iotable_init(mx35_io_desc, ARRAY_SIZE(mx35_io_desc));
125 }
126 
127 static void imx35_idle(void)
128 {
129 	int reg = imx_readl(mx3_ccm_base + MXC_CCM_CCMR);
130 	reg &= ~MXC_CCM_CCMR_LPM_MASK;
131 	reg |= MXC_CCM_CCMR_LPM_WAIT_MX35;
132 	imx_writel(reg, mx3_ccm_base + MXC_CCM_CCMR);
133 
134 	imx3_idle();
135 }
136 
137 void __init imx35_init_early(void)
138 {
139 	struct device_node *np;
140 
141 	mxc_set_cpu_type(MXC_CPU_MX35);
142 	arm_pm_idle = imx35_idle;
143 	arch_ioremap_caller = imx3_ioremap_caller;
144 	np = of_find_compatible_node(NULL, NULL, "fsl,imx35-ccm");
145 	mx3_ccm_base = of_iomap(np, 0);
146 	BUG_ON(!mx3_ccm_base);
147 }
148 #endif /* ifdef CONFIG_SOC_IMX35 */
149