1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2015 Freescale Semiconductor, Inc. 4 */ 5 #include <linux/irqchip.h> 6 #include <linux/mfd/syscon.h> 7 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h> 8 #include <linux/micrel_phy.h> 9 #include <linux/of_platform.h> 10 #include <linux/phy.h> 11 #include <linux/regmap.h> 12 #include <asm/mach/arch.h> 13 #include <asm/mach/map.h> 14 15 #include "common.h" 16 #include "cpuidle.h" 17 #include "hardware.h" 18 19 static void __init imx6ul_enet_clk_init(void) 20 { 21 struct regmap *gpr; 22 23 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6ul-iomuxc-gpr"); 24 if (!IS_ERR(gpr)) 25 regmap_update_bits(gpr, IOMUXC_GPR1, IMX6UL_GPR1_ENET_CLK_DIR, 26 IMX6UL_GPR1_ENET_CLK_OUTPUT); 27 else 28 pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n"); 29 } 30 31 static inline void imx6ul_enet_init(void) 32 { 33 imx6ul_enet_clk_init(); 34 } 35 36 static void __init imx6ul_init_machine(void) 37 { 38 imx_print_silicon_rev(cpu_is_imx6ull() ? "i.MX6ULL" : "i.MX6UL", 39 imx_get_soc_revision()); 40 41 of_platform_default_populate(NULL, NULL, NULL); 42 imx6ul_enet_init(); 43 imx_anatop_init(); 44 imx6ul_pm_init(); 45 } 46 47 static void __init imx6ul_init_irq(void) 48 { 49 imx_init_revision_from_anatop(); 50 imx_src_init(); 51 irqchip_init(); 52 imx6_pm_ccm_init("fsl,imx6ul-ccm"); 53 } 54 55 static void __init imx6ul_init_late(void) 56 { 57 imx6sx_cpuidle_init(); 58 59 if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ)) 60 platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0); 61 } 62 63 static const char * const imx6ul_dt_compat[] __initconst = { 64 "fsl,imx6ul", 65 "fsl,imx6ull", 66 "fsl,imx6ulz", 67 NULL, 68 }; 69 70 DT_MACHINE_START(IMX6UL, "Freescale i.MX6 Ultralite (Device Tree)") 71 .init_irq = imx6ul_init_irq, 72 .init_machine = imx6ul_init_machine, 73 .init_late = imx6ul_init_late, 74 .dt_compat = imx6ul_dt_compat, 75 MACHINE_END 76