xref: /openbmc/linux/arch/arm/mach-imx/mach-imx6q.c (revision 1ab142d4)
1 /*
2  * Copyright 2011 Freescale Semiconductor, Inc.
3  * Copyright 2011 Linaro Ltd.
4  *
5  * The code contained herein is licensed under the GNU General Public
6  * License. You may obtain a copy of the GNU General Public License
7  * Version 2 or later at the following locations:
8  *
9  * http://www.opensource.org/licenses/gpl-license.html
10  * http://www.gnu.org/copyleft/gpl.html
11  */
12 
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/io.h>
16 #include <linux/irq.h>
17 #include <linux/irqdomain.h>
18 #include <linux/of.h>
19 #include <linux/of_address.h>
20 #include <linux/of_irq.h>
21 #include <linux/of_platform.h>
22 #include <linux/phy.h>
23 #include <linux/micrel_phy.h>
24 #include <asm/hardware/cache-l2x0.h>
25 #include <asm/hardware/gic.h>
26 #include <asm/mach/arch.h>
27 #include <asm/mach/time.h>
28 #include <mach/common.h>
29 #include <mach/hardware.h>
30 
31 void imx6q_restart(char mode, const char *cmd)
32 {
33 	struct device_node *np;
34 	void __iomem *wdog_base;
35 
36 	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-wdt");
37 	wdog_base = of_iomap(np, 0);
38 	if (!wdog_base)
39 		goto soft;
40 
41 	imx_src_prepare_restart();
42 
43 	/* enable wdog */
44 	writew_relaxed(1 << 2, wdog_base);
45 	/* write twice to ensure the request will not get ignored */
46 	writew_relaxed(1 << 2, wdog_base);
47 
48 	/* wait for reset to assert ... */
49 	mdelay(500);
50 
51 	pr_err("Watchdog reset failed to assert reset\n");
52 
53 	/* delay to allow the serial port to show the message */
54 	mdelay(50);
55 
56 soft:
57 	/* we'll take a jump through zero as a poor second */
58 	soft_restart(0);
59 }
60 
61 /* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
62 static int ksz9021rn_phy_fixup(struct phy_device *phydev)
63 {
64 	/* min rx data delay */
65 	phy_write(phydev, 0x0b, 0x8105);
66 	phy_write(phydev, 0x0c, 0x0000);
67 
68 	/* max rx/tx clock delay, min rx/tx control delay */
69 	phy_write(phydev, 0x0b, 0x8104);
70 	phy_write(phydev, 0x0c, 0xf0f0);
71 	phy_write(phydev, 0x0b, 0x104);
72 
73 	return 0;
74 }
75 
76 static void __init imx6q_init_machine(void)
77 {
78 	if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
79 		phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
80 					   ksz9021rn_phy_fixup);
81 
82 	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
83 
84 	imx6q_pm_init();
85 }
86 
87 static void __init imx6q_map_io(void)
88 {
89 	imx_lluart_map_io();
90 	imx_scu_map_io();
91 	imx6q_clock_map_io();
92 }
93 
94 static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
95 				struct device_node *interrupt_parent)
96 {
97 	static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
98 
99 	gpio_irq_base -= 32;
100 	irq_domain_add_legacy(np, 32, gpio_irq_base, 0, &irq_domain_simple_ops,
101 			      NULL);
102 
103 	return 0;
104 }
105 
106 static const struct of_device_id imx6q_irq_match[] __initconst = {
107 	{ .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
108 	{ .compatible = "fsl,imx6q-gpio", .data = imx6q_gpio_add_irq_domain, },
109 	{ /* sentinel */ }
110 };
111 
112 static void __init imx6q_init_irq(void)
113 {
114 	l2x0_of_init(0, ~0UL);
115 	imx_src_init();
116 	imx_gpc_init();
117 	of_irq_init(imx6q_irq_match);
118 }
119 
120 static void __init imx6q_timer_init(void)
121 {
122 	mx6q_clocks_init();
123 }
124 
125 static struct sys_timer imx6q_timer = {
126 	.init = imx6q_timer_init,
127 };
128 
129 static const char *imx6q_dt_compat[] __initdata = {
130 	"fsl,imx6q-arm2",
131 	"fsl,imx6q-sabrelite",
132 	NULL,
133 };
134 
135 DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
136 	.map_io		= imx6q_map_io,
137 	.init_irq	= imx6q_init_irq,
138 	.handle_irq	= imx6q_handle_irq,
139 	.timer		= &imx6q_timer,
140 	.init_machine	= imx6q_init_machine,
141 	.dt_compat	= imx6q_dt_compat,
142 	.restart	= imx6q_restart,
143 MACHINE_END
144