1 /* 2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright 2011 Linaro Ltd. 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13 #include <linux/clk.h> 14 #include <linux/clkdev.h> 15 #include <linux/err.h> 16 #include <linux/io.h> 17 #include <linux/irq.h> 18 #include <linux/of_irq.h> 19 #include <linux/of_platform.h> 20 #include <asm/mach/arch.h> 21 #include <asm/mach/time.h> 22 #include <mach/common.h> 23 #include <mach/mx53.h> 24 25 /* 26 * Lookup table for attaching a specific name and platform_data pointer to 27 * devices as they get created by of_platform_populate(). Ideally this table 28 * would not exist, but the current clock implementation depends on some devices 29 * having a specific name. 30 */ 31 static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = { 32 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL), 33 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL), 34 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL), 35 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL), 36 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL), 37 OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL), 38 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL), 39 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL), 40 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL), 41 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL), 42 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL), 43 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL), 44 OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL), 45 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL), 46 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL), 47 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL), 48 OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL), 49 OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL), 50 { /* sentinel */ } 51 }; 52 53 static void __init imx53_qsb_init(void) 54 { 55 struct clk *clk; 56 57 clk = clk_get_sys(NULL, "ssi_ext1"); 58 if (IS_ERR(clk)) { 59 pr_err("failed to get clk ssi_ext1\n"); 60 return; 61 } 62 63 clk_register_clkdev(clk, NULL, "0-000a"); 64 } 65 66 static void __init imx53_dt_init(void) 67 { 68 if (of_machine_is_compatible("fsl,imx53-qsb")) 69 imx53_qsb_init(); 70 71 of_platform_populate(NULL, of_default_bus_match_table, 72 imx53_auxdata_lookup, NULL); 73 } 74 75 static void __init imx53_timer_init(void) 76 { 77 mx53_clocks_init_dt(); 78 } 79 80 static struct sys_timer imx53_timer = { 81 .init = imx53_timer_init, 82 }; 83 84 static const char *imx53_dt_board_compat[] __initdata = { 85 "fsl,imx53", 86 NULL 87 }; 88 89 DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)") 90 .map_io = mx53_map_io, 91 .init_early = imx53_init_early, 92 .init_irq = mx53_init_irq, 93 .handle_irq = imx53_handle_irq, 94 .timer = &imx53_timer, 95 .init_machine = imx53_dt_init, 96 .init_late = imx53_init_late, 97 .dt_compat = imx53_dt_board_compat, 98 .restart = mxc_restart, 99 MACHINE_END 100