1 /* 2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. 3 * Copyright 2011 Linaro Ltd. 4 * 5 * The code contained herein is licensed under the GNU General Public 6 * License. You may obtain a copy of the GNU General Public License 7 * Version 2 or later at the following locations: 8 * 9 * http://www.opensource.org/licenses/gpl-license.html 10 * http://www.gnu.org/copyleft/gpl.html 11 */ 12 13 #include <linux/io.h> 14 #include <linux/irq.h> 15 #include <linux/of_irq.h> 16 #include <linux/of_platform.h> 17 #include <asm/mach/arch.h> 18 #include <asm/mach/time.h> 19 20 #include "common.h" 21 #include "hardware.h" 22 23 static void __init imx51_init_early(void) 24 { 25 mxc_set_cpu_type(MXC_CPU_MX51); 26 } 27 28 /* 29 * The MIPI HSC unit has been removed from the i.MX51 Reference Manual by 30 * the Freescale marketing division. However this did not remove the 31 * hardware from the chip which still needs to be configured for proper 32 * IPU support. 33 */ 34 #define MX51_MIPI_HSC_BASE 0x83fdc000 35 static void __init imx51_ipu_mipi_setup(void) 36 { 37 void __iomem *hsc_addr; 38 39 hsc_addr = ioremap(MX51_MIPI_HSC_BASE, SZ_16K); 40 WARN_ON(!hsc_addr); 41 42 /* setup MIPI module to legacy mode */ 43 imx_writel(0xf00, hsc_addr); 44 45 /* CSI mode: reserved; DI control mode: legacy (from Freescale BSP) */ 46 imx_writel(imx_readl(hsc_addr + 0x800) | 0x30ff, hsc_addr + 0x800); 47 48 iounmap(hsc_addr); 49 } 50 51 static void __init imx51_dt_init(void) 52 { 53 imx51_ipu_mipi_setup(); 54 imx_src_init(); 55 56 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 57 } 58 59 static void __init imx51_init_late(void) 60 { 61 mx51_neon_fixup(); 62 imx51_pm_init(); 63 } 64 65 static const char * const imx51_dt_board_compat[] __initconst = { 66 "fsl,imx51", 67 NULL 68 }; 69 70 DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)") 71 .init_early = imx51_init_early, 72 .init_irq = tzic_init_irq, 73 .init_machine = imx51_dt_init, 74 .init_late = imx51_init_late, 75 .dt_compat = imx51_dt_board_compat, 76 MACHINE_END 77