11fc593feSArnd Bergmann/* 21fc593feSArnd Bergmann * Copyright 2011 Freescale Semiconductor, Inc. 31fc593feSArnd Bergmann * Copyright 2011 Linaro Ltd. 41fc593feSArnd Bergmann * 51fc593feSArnd Bergmann * The code contained herein is licensed under the GNU General Public 61fc593feSArnd Bergmann * License. You may obtain a copy of the GNU General Public License 71fc593feSArnd Bergmann * Version 2 or later at the following locations: 81fc593feSArnd Bergmann * 91fc593feSArnd Bergmann * http://www.opensource.org/licenses/gpl-license.html 101fc593feSArnd Bergmann * http://www.gnu.org/copyleft/gpl.html 111fc593feSArnd Bergmann */ 121fc593feSArnd Bergmann 131fc593feSArnd Bergmann#include <linux/linkage.h> 141fc593feSArnd Bergmann#include <linux/init.h> 151fc593feSArnd Bergmann#include <asm/asm-offsets.h> 161fc593feSArnd Bergmann#include <asm/hardware/cache-l2x0.h> 171fc593feSArnd Bergmann 181fc593feSArnd Bergmann .section ".text.head", "ax" 191fc593feSArnd Bergmann 201fc593feSArnd Bergmann#ifdef CONFIG_SMP 211fc593feSArnd BergmannENTRY(v7_secondary_startup) 221fc593feSArnd Bergmann bl v7_invalidate_l1 231fc593feSArnd Bergmann b secondary_startup 241fc593feSArnd BergmannENDPROC(v7_secondary_startup) 251fc593feSArnd Bergmann#endif 261fc593feSArnd Bergmann 27cb48389bSArnd Bergmann#ifdef CONFIG_ARM_CPU_SUSPEND 281fc593feSArnd Bergmann/* 291fc593feSArnd Bergmann * The following code is located into the .data section. This is to 301fc593feSArnd Bergmann * allow phys_l2x0_saved_regs to be accessed with a relative load 311fc593feSArnd Bergmann * as we are running on physical address here. 321fc593feSArnd Bergmann */ 331fc593feSArnd Bergmann .data 341fc593feSArnd Bergmann .align 351fc593feSArnd Bergmann 361fc593feSArnd Bergmann#ifdef CONFIG_CACHE_L2X0 371fc593feSArnd Bergmann .macro pl310_resume 381fc593feSArnd Bergmann ldr r2, phys_l2x0_saved_regs 391fc593feSArnd Bergmann ldr r0, [r2, #L2X0_R_PHY_BASE] @ get physical base of l2x0 401fc593feSArnd Bergmann ldr r1, [r2, #L2X0_R_AUX_CTRL] @ get aux_ctrl value 411fc593feSArnd Bergmann str r1, [r0, #L2X0_AUX_CTRL] @ restore aux_ctrl 421fc593feSArnd Bergmann mov r1, #0x1 431fc593feSArnd Bergmann str r1, [r0, #L2X0_CTRL] @ re-enable L2 441fc593feSArnd Bergmann .endm 451fc593feSArnd Bergmann 461fc593feSArnd Bergmann .globl phys_l2x0_saved_regs 471fc593feSArnd Bergmannphys_l2x0_saved_regs: 481fc593feSArnd Bergmann .long 0 491fc593feSArnd Bergmann#else 501fc593feSArnd Bergmann .macro pl310_resume 511fc593feSArnd Bergmann .endm 521fc593feSArnd Bergmann#endif 531fc593feSArnd Bergmann 541fc593feSArnd BergmannENTRY(v7_cpu_resume) 551fc593feSArnd Bergmann bl v7_invalidate_l1 561fc593feSArnd Bergmann pl310_resume 571fc593feSArnd Bergmann b cpu_resume 581fc593feSArnd BergmannENDPROC(v7_cpu_resume) 591fc593feSArnd Bergmann#endif 60