xref: /openbmc/linux/arch/arm/mach-imx/cpu.c (revision e23feb16)
1 
2 #include <linux/module.h>
3 #include <linux/io.h>
4 
5 #include "hardware.h"
6 #include "common.h"
7 
8 unsigned int __mxc_cpu_type;
9 EXPORT_SYMBOL(__mxc_cpu_type);
10 
11 void mxc_set_cpu_type(unsigned int type)
12 {
13 	__mxc_cpu_type = type;
14 }
15 
16 void imx_print_silicon_rev(const char *cpu, int srev)
17 {
18 	if (srev == IMX_CHIP_REVISION_UNKNOWN)
19 		pr_info("CPU identified as %s, unknown revision\n", cpu);
20 	else
21 		pr_info("CPU identified as %s, silicon rev %d.%d\n",
22 				cpu, (srev >> 4) & 0xf, srev & 0xf);
23 }
24 
25 void __init imx_set_aips(void __iomem *base)
26 {
27 	unsigned int reg;
28 /*
29  * Set all MPROTx to be non-bufferable, trusted for R/W,
30  * not forced to user-mode.
31  */
32 	__raw_writel(0x77777777, base + 0x0);
33 	__raw_writel(0x77777777, base + 0x4);
34 
35 /*
36  * Set all OPACRx to be non-bufferable, to not require
37  * supervisor privilege level for access, allow for
38  * write access and untrusted master access.
39  */
40 	__raw_writel(0x0, base + 0x40);
41 	__raw_writel(0x0, base + 0x44);
42 	__raw_writel(0x0, base + 0x48);
43 	__raw_writel(0x0, base + 0x4C);
44 	reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
45 	__raw_writel(reg, base + 0x50);
46 }
47