xref: /openbmc/linux/arch/arm/mach-imx/common.h (revision d2999e1b)
1 /*
2  * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
3  */
4 
5 /*
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #ifndef __ASM_ARCH_MXC_COMMON_H__
12 #define __ASM_ARCH_MXC_COMMON_H__
13 
14 #include <linux/reboot.h>
15 
16 struct irq_data;
17 struct platform_device;
18 struct pt_regs;
19 struct clk;
20 struct device_node;
21 enum mxc_cpu_pwr_mode;
22 
23 void mx1_map_io(void);
24 void mx21_map_io(void);
25 void mx25_map_io(void);
26 void mx27_map_io(void);
27 void mx31_map_io(void);
28 void mx35_map_io(void);
29 void mx51_map_io(void);
30 void mx53_map_io(void);
31 void imx1_init_early(void);
32 void imx21_init_early(void);
33 void imx25_init_early(void);
34 void imx27_init_early(void);
35 void imx31_init_early(void);
36 void imx35_init_early(void);
37 void imx51_init_early(void);
38 void imx53_init_early(void);
39 void mxc_init_irq(void __iomem *);
40 void tzic_init_irq(void __iomem *);
41 void mx1_init_irq(void);
42 void mx21_init_irq(void);
43 void mx25_init_irq(void);
44 void mx27_init_irq(void);
45 void mx31_init_irq(void);
46 void mx35_init_irq(void);
47 void mx51_init_irq(void);
48 void mx53_init_irq(void);
49 void imx1_soc_init(void);
50 void imx21_soc_init(void);
51 void imx25_soc_init(void);
52 void imx27_soc_init(void);
53 void imx31_soc_init(void);
54 void imx35_soc_init(void);
55 void imx51_soc_init(void);
56 void imx51_init_late(void);
57 void imx53_init_late(void);
58 void epit_timer_init(void __iomem *base, int irq);
59 void mxc_timer_init(void __iomem *, int);
60 void mxc_timer_init_dt(struct device_node *);
61 int mx1_clocks_init(unsigned long fref);
62 int mx21_clocks_init(unsigned long lref, unsigned long fref);
63 int mx25_clocks_init(void);
64 int mx27_clocks_init(unsigned long fref);
65 int mx31_clocks_init(unsigned long fref);
66 int mx35_clocks_init(void);
67 int mx51_clocks_init(unsigned long ckil, unsigned long osc,
68 			unsigned long ckih1, unsigned long ckih2);
69 int mx25_clocks_init_dt(void);
70 int mx27_clocks_init_dt(void);
71 int mx31_clocks_init_dt(void);
72 struct platform_device *mxc_register_gpio(char *name, int id,
73 	resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
74 void mxc_set_cpu_type(unsigned int type);
75 void mxc_restart(enum reboot_mode, const char *);
76 void mxc_arch_reset_init(void __iomem *);
77 void mxc_arch_reset_init_dt(void);
78 int mx53_revision(void);
79 void imx_set_aips(void __iomem *);
80 int mxc_device_init(void);
81 void imx_set_soc_revision(unsigned int rev);
82 unsigned int imx_get_soc_revision(void);
83 void imx_init_revision_from_anatop(void);
84 struct device *imx_soc_device_init(void);
85 
86 enum mxc_cpu_pwr_mode {
87 	WAIT_CLOCKED,		/* wfi only */
88 	WAIT_UNCLOCKED,		/* WAIT */
89 	WAIT_UNCLOCKED_POWER_OFF,	/* WAIT + SRPG */
90 	STOP_POWER_ON,		/* just STOP */
91 	STOP_POWER_OFF,		/* STOP + SRPG */
92 };
93 
94 enum mx3_cpu_pwr_mode {
95 	MX3_RUN,
96 	MX3_WAIT,
97 	MX3_DOZE,
98 	MX3_SLEEP,
99 };
100 
101 void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
102 void imx_print_silicon_rev(const char *cpu, int srev);
103 
104 void imx_enable_cpu(int cpu, bool enable);
105 void imx_set_cpu_jump(int cpu, void *jump_addr);
106 u32 imx_get_cpu_arg(int cpu);
107 void imx_set_cpu_arg(int cpu, u32 arg);
108 #ifdef CONFIG_SMP
109 void v7_secondary_startup(void);
110 void imx_scu_map_io(void);
111 void imx_smp_prepare(void);
112 void imx_scu_standby_enable(void);
113 #else
114 static inline void imx_scu_map_io(void) {}
115 static inline void imx_smp_prepare(void) {}
116 static inline void imx_scu_standby_enable(void) {}
117 #endif
118 void imx_src_init(void);
119 void imx_gpc_init(void);
120 void imx_gpc_pre_suspend(void);
121 void imx_gpc_post_resume(void);
122 void imx_gpc_mask_all(void);
123 void imx_gpc_restore_all(void);
124 void imx_gpc_irq_mask(struct irq_data *d);
125 void imx_gpc_irq_unmask(struct irq_data *d);
126 void imx_anatop_init(void);
127 void imx_anatop_pre_suspend(void);
128 void imx_anatop_post_resume(void);
129 int imx6q_set_lpm(enum mxc_cpu_pwr_mode mode);
130 void imx6q_set_int_mem_clk_lpm(void);
131 void imx6sl_set_wait_clk(bool enter);
132 
133 void imx_cpu_die(unsigned int cpu);
134 int imx_cpu_kill(unsigned int cpu);
135 
136 #ifdef CONFIG_SUSPEND
137 void v7_cpu_resume(void);
138 void imx6_suspend(void __iomem *ocram_vbase);
139 #else
140 static inline void v7_cpu_resume(void) {}
141 static inline void imx6_suspend(void __iomem *ocram_vbase) {}
142 #endif
143 
144 void imx6q_pm_init(void);
145 void imx6dl_pm_init(void);
146 void imx6sl_pm_init(void);
147 void imx6q_pm_set_ccm_base(void __iomem *base);
148 
149 #ifdef CONFIG_PM
150 void imx5_pm_init(void);
151 #else
152 static inline void imx5_pm_init(void) {}
153 #endif
154 
155 #ifdef CONFIG_NEON
156 int mx51_neon_fixup(void);
157 #else
158 static inline int mx51_neon_fixup(void) { return 0; }
159 #endif
160 
161 #ifdef CONFIG_CACHE_L2X0
162 void imx_init_l2cache(void);
163 #else
164 static inline void imx_init_l2cache(void) {}
165 #endif
166 
167 extern struct smp_operations imx_smp_ops;
168 
169 #endif
170