xref: /openbmc/linux/arch/arm/mach-imx/anatop.c (revision 39b6f3aa)
1 /*
2  * Copyright (C) 2013 Freescale Semiconductor, Inc.
3  *
4  * The code contained herein is licensed under the GNU General Public
5  * License. You may obtain a copy of the GNU General Public License
6  * Version 2 or later at the following locations:
7  *
8  * http://www.opensource.org/licenses/gpl-license.html
9  * http://www.gnu.org/copyleft/gpl.html
10  */
11 
12 #include <linux/err.h>
13 #include <linux/io.h>
14 #include <linux/of.h>
15 #include <linux/of_address.h>
16 #include <linux/mfd/syscon.h>
17 #include <linux/regmap.h>
18 #include "common.h"
19 
20 #define REG_SET		0x4
21 #define REG_CLR		0x8
22 
23 #define ANADIG_REG_2P5		0x130
24 #define ANADIG_REG_CORE		0x140
25 #define ANADIG_ANA_MISC0	0x150
26 #define ANADIG_USB1_CHRG_DETECT	0x1b0
27 #define ANADIG_USB2_CHRG_DETECT	0x210
28 #define ANADIG_DIGPROG		0x260
29 
30 #define BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG	0x40000
31 #define BM_ANADIG_REG_CORE_FET_ODRIVE		0x20000000
32 #define BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG	0x1000
33 #define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B	0x80000
34 #define BM_ANADIG_USB_CHRG_DETECT_EN_B		0x100000
35 
36 static struct regmap *anatop;
37 
38 static void imx_anatop_enable_weak2p5(bool enable)
39 {
40 	u32 reg, val;
41 
42 	regmap_read(anatop, ANADIG_ANA_MISC0, &val);
43 
44 	/* can only be enabled when stop_mode_config is clear. */
45 	reg = ANADIG_REG_2P5;
46 	reg += (enable && (val & BM_ANADIG_ANA_MISC0_STOP_MODE_CONFIG) == 0) ?
47 		REG_SET : REG_CLR;
48 	regmap_write(anatop, reg, BM_ANADIG_REG_2P5_ENABLE_WEAK_LINREG);
49 }
50 
51 static void imx_anatop_enable_fet_odrive(bool enable)
52 {
53 	regmap_write(anatop, ANADIG_REG_CORE + (enable ? REG_SET : REG_CLR),
54 		BM_ANADIG_REG_CORE_FET_ODRIVE);
55 }
56 
57 void imx_anatop_pre_suspend(void)
58 {
59 	imx_anatop_enable_weak2p5(true);
60 	imx_anatop_enable_fet_odrive(true);
61 }
62 
63 void imx_anatop_post_resume(void)
64 {
65 	imx_anatop_enable_fet_odrive(false);
66 	imx_anatop_enable_weak2p5(false);
67 }
68 
69 void imx_anatop_usb_chrg_detect_disable(void)
70 {
71 	regmap_write(anatop, ANADIG_USB1_CHRG_DETECT,
72 		BM_ANADIG_USB_CHRG_DETECT_EN_B
73 		| BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
74 	regmap_write(anatop, ANADIG_USB2_CHRG_DETECT,
75 		BM_ANADIG_USB_CHRG_DETECT_EN_B |
76 		BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
77 }
78 
79 u32 imx_anatop_get_digprog(void)
80 {
81 	struct device_node *np;
82 	void __iomem *anatop_base;
83 	static u32 digprog;
84 
85 	if (digprog)
86 		return digprog;
87 
88 	np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
89 	anatop_base = of_iomap(np, 0);
90 	WARN_ON(!anatop_base);
91 	digprog = readl_relaxed(anatop_base + ANADIG_DIGPROG);
92 
93 	return digprog;
94 }
95 
96 void __init imx_anatop_init(void)
97 {
98 	anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
99 	if (IS_ERR(anatop)) {
100 		pr_err("%s: failed to find imx6q-anatop regmap!\n", __func__);
101 		return;
102 	}
103 }
104