1 /* 2 * linux/arch/arm/mach-footbridge/netwinder-hw.c 3 * 4 * Netwinder machine fixup 5 * 6 * Copyright (C) 1998, 1999 Russell King, Phil Blundell 7 */ 8 #include <linux/config.h> 9 #include <linux/module.h> 10 #include <linux/ioport.h> 11 #include <linux/kernel.h> 12 #include <linux/delay.h> 13 #include <linux/init.h> 14 15 #include <asm/hardware/dec21285.h> 16 #include <asm/io.h> 17 #include <asm/leds.h> 18 #include <asm/mach-types.h> 19 #include <asm/setup.h> 20 21 #include <asm/mach/arch.h> 22 23 #include "common.h" 24 25 #define IRDA_IO_BASE 0x180 26 #define GP1_IO_BASE 0x338 27 #define GP2_IO_BASE 0x33a 28 29 30 #ifdef CONFIG_LEDS 31 #define DEFAULT_LEDS 0 32 #else 33 #define DEFAULT_LEDS GPIO_GREEN_LED 34 #endif 35 36 /* 37 * Winbond WB83977F accessibility stuff 38 */ 39 static inline void wb977_open(void) 40 { 41 outb(0x87, 0x370); 42 outb(0x87, 0x370); 43 } 44 45 static inline void wb977_close(void) 46 { 47 outb(0xaa, 0x370); 48 } 49 50 static inline void wb977_wb(int reg, int val) 51 { 52 outb(reg, 0x370); 53 outb(val, 0x371); 54 } 55 56 static inline void wb977_ww(int reg, int val) 57 { 58 outb(reg, 0x370); 59 outb(val >> 8, 0x371); 60 outb(reg + 1, 0x370); 61 outb(val & 255, 0x371); 62 } 63 64 #define wb977_device_select(dev) wb977_wb(0x07, dev) 65 #define wb977_device_disable() wb977_wb(0x30, 0x00) 66 #define wb977_device_enable() wb977_wb(0x30, 0x01) 67 68 /* 69 * This is a lock for accessing ports GP1_IO_BASE and GP2_IO_BASE 70 */ 71 DEFINE_SPINLOCK(gpio_lock); 72 73 static unsigned int current_gpio_op; 74 static unsigned int current_gpio_io; 75 static unsigned int current_cpld; 76 77 void gpio_modify_op(int mask, int set) 78 { 79 unsigned int new_gpio, changed; 80 81 new_gpio = (current_gpio_op & ~mask) | set; 82 changed = new_gpio ^ current_gpio_op; 83 current_gpio_op = new_gpio; 84 85 if (changed & 0xff) 86 outb(new_gpio, GP1_IO_BASE); 87 if (changed & 0xff00) 88 outb(new_gpio >> 8, GP2_IO_BASE); 89 } 90 91 static inline void __gpio_modify_io(int mask, int in) 92 { 93 unsigned int new_gpio, changed; 94 int port; 95 96 new_gpio = (current_gpio_io & ~mask) | in; 97 changed = new_gpio ^ current_gpio_io; 98 current_gpio_io = new_gpio; 99 100 changed >>= 1; 101 new_gpio >>= 1; 102 103 wb977_device_select(7); 104 105 for (port = 0xe1; changed && port < 0xe8; changed >>= 1) { 106 wb977_wb(port, new_gpio & 1); 107 108 port += 1; 109 new_gpio >>= 1; 110 } 111 112 wb977_device_select(8); 113 114 for (port = 0xe8; changed && port < 0xec; changed >>= 1) { 115 wb977_wb(port, new_gpio & 1); 116 117 port += 1; 118 new_gpio >>= 1; 119 } 120 } 121 122 void gpio_modify_io(int mask, int in) 123 { 124 /* Open up the SuperIO chip */ 125 wb977_open(); 126 127 __gpio_modify_io(mask, in); 128 129 /* Close up the EFER gate */ 130 wb977_close(); 131 } 132 133 int gpio_read(void) 134 { 135 return inb(GP1_IO_BASE) | inb(GP2_IO_BASE) << 8; 136 } 137 138 /* 139 * Initialise the Winbond W83977F global registers 140 */ 141 static inline void wb977_init_global(void) 142 { 143 /* 144 * Enable R/W config registers 145 */ 146 wb977_wb(0x26, 0x40); 147 148 /* 149 * Power down FDC (not used) 150 */ 151 wb977_wb(0x22, 0xfe); 152 153 /* 154 * GP12, GP11, CIRRX, IRRXH, GP10 155 */ 156 wb977_wb(0x2a, 0xc1); 157 158 /* 159 * GP23, GP22, GP21, GP20, GP13 160 */ 161 wb977_wb(0x2b, 0x6b); 162 163 /* 164 * GP17, GP16, GP15, GP14 165 */ 166 wb977_wb(0x2c, 0x55); 167 } 168 169 /* 170 * Initialise the Winbond W83977F printer port 171 */ 172 static inline void wb977_init_printer(void) 173 { 174 wb977_device_select(1); 175 176 /* 177 * mode 1 == EPP 178 */ 179 wb977_wb(0xf0, 0x01); 180 } 181 182 /* 183 * Initialise the Winbond W83977F keyboard controller 184 */ 185 static inline void wb977_init_keyboard(void) 186 { 187 wb977_device_select(5); 188 189 /* 190 * Keyboard controller address 191 */ 192 wb977_ww(0x60, 0x0060); 193 wb977_ww(0x62, 0x0064); 194 195 /* 196 * Keyboard IRQ 1, active high, edge trigger 197 */ 198 wb977_wb(0x70, 1); 199 wb977_wb(0x71, 0x02); 200 201 /* 202 * Mouse IRQ 5, active high, edge trigger 203 */ 204 wb977_wb(0x72, 5); 205 wb977_wb(0x73, 0x02); 206 207 /* 208 * KBC 8MHz 209 */ 210 wb977_wb(0xf0, 0x40); 211 212 /* 213 * Enable device 214 */ 215 wb977_device_enable(); 216 } 217 218 /* 219 * Initialise the Winbond W83977F Infra-Red device 220 */ 221 static inline void wb977_init_irda(void) 222 { 223 wb977_device_select(6); 224 225 /* 226 * IR base address 227 */ 228 wb977_ww(0x60, IRDA_IO_BASE); 229 230 /* 231 * IRDA IRQ 6, active high, edge trigger 232 */ 233 wb977_wb(0x70, 6); 234 wb977_wb(0x71, 0x02); 235 236 /* 237 * RX DMA - ISA DMA 0 238 */ 239 wb977_wb(0x74, 0x00); 240 241 /* 242 * TX DMA - Disable Tx DMA 243 */ 244 wb977_wb(0x75, 0x04); 245 246 /* 247 * Append CRC, Enable bank selection 248 */ 249 wb977_wb(0xf0, 0x03); 250 251 /* 252 * Enable device 253 */ 254 wb977_device_enable(); 255 } 256 257 /* 258 * Initialise Winbond W83977F general purpose IO 259 */ 260 static inline void wb977_init_gpio(void) 261 { 262 unsigned long flags; 263 264 /* 265 * Set up initial I/O definitions 266 */ 267 current_gpio_io = -1; 268 __gpio_modify_io(-1, GPIO_DONE | GPIO_WDTIMER); 269 270 wb977_device_select(7); 271 272 /* 273 * Group1 base address 274 */ 275 wb977_ww(0x60, GP1_IO_BASE); 276 wb977_ww(0x62, 0); 277 wb977_ww(0x64, 0); 278 279 /* 280 * GP10 (Orage button) IRQ 10, active high, edge trigger 281 */ 282 wb977_wb(0x70, 10); 283 wb977_wb(0x71, 0x02); 284 285 /* 286 * GP10: Debounce filter enabled, IRQ, input 287 */ 288 wb977_wb(0xe0, 0x19); 289 290 /* 291 * Enable Group1 292 */ 293 wb977_device_enable(); 294 295 wb977_device_select(8); 296 297 /* 298 * Group2 base address 299 */ 300 wb977_ww(0x60, GP2_IO_BASE); 301 302 /* 303 * Clear watchdog timer regs 304 * - timer disable 305 */ 306 wb977_wb(0xf2, 0x00); 307 308 /* 309 * - disable LED, no mouse nor keyboard IRQ 310 */ 311 wb977_wb(0xf3, 0x00); 312 313 /* 314 * - timer counting, disable power LED, disable timeouot 315 */ 316 wb977_wb(0xf4, 0x00); 317 318 /* 319 * Enable group2 320 */ 321 wb977_device_enable(); 322 323 /* 324 * Set Group1/Group2 outputs 325 */ 326 spin_lock_irqsave(&gpio_lock, flags); 327 gpio_modify_op(-1, GPIO_RED_LED | GPIO_FAN); 328 spin_unlock_irqrestore(&gpio_lock, flags); 329 } 330 331 /* 332 * Initialise the Winbond W83977F chip. 333 */ 334 static void __init wb977_init(void) 335 { 336 request_region(0x370, 2, "W83977AF configuration"); 337 338 /* 339 * Open up the SuperIO chip 340 */ 341 wb977_open(); 342 343 /* 344 * Initialise the global registers 345 */ 346 wb977_init_global(); 347 348 /* 349 * Initialise the various devices in 350 * the multi-IO chip. 351 */ 352 wb977_init_printer(); 353 wb977_init_keyboard(); 354 wb977_init_irda(); 355 wb977_init_gpio(); 356 357 /* 358 * Close up the EFER gate 359 */ 360 wb977_close(); 361 } 362 363 void cpld_modify(int mask, int set) 364 { 365 int msk; 366 367 current_cpld = (current_cpld & ~mask) | set; 368 369 gpio_modify_io(GPIO_DATA | GPIO_IOCLK | GPIO_IOLOAD, 0); 370 gpio_modify_op(GPIO_IOLOAD, 0); 371 372 for (msk = 8; msk; msk >>= 1) { 373 int bit = current_cpld & msk; 374 375 gpio_modify_op(GPIO_DATA | GPIO_IOCLK, bit ? GPIO_DATA : 0); 376 gpio_modify_op(GPIO_IOCLK, GPIO_IOCLK); 377 } 378 379 gpio_modify_op(GPIO_IOCLK|GPIO_DATA, 0); 380 gpio_modify_op(GPIO_IOLOAD|GPIO_DSCLK, GPIO_IOLOAD|GPIO_DSCLK); 381 gpio_modify_op(GPIO_IOLOAD, 0); 382 } 383 384 static void __init cpld_init(void) 385 { 386 unsigned long flags; 387 388 spin_lock_irqsave(&gpio_lock, flags); 389 cpld_modify(-1, CPLD_UNMUTE | CPLD_7111_DISABLE); 390 spin_unlock_irqrestore(&gpio_lock, flags); 391 } 392 393 static unsigned char rwa_unlock[] __initdata = 394 { 0x00, 0x00, 0x6a, 0xb5, 0xda, 0xed, 0xf6, 0xfb, 0x7d, 0xbe, 0xdf, 0x6f, 0x37, 0x1b, 395 0x0d, 0x86, 0xc3, 0x61, 0xb0, 0x58, 0x2c, 0x16, 0x8b, 0x45, 0xa2, 0xd1, 0xe8, 0x74, 396 0x3a, 0x9d, 0xce, 0xe7, 0x73, 0x39 }; 397 398 #ifndef DEBUG 399 #define dprintk(x...) 400 #else 401 #define dprintk(x...) printk(x) 402 #endif 403 404 #define WRITE_RWA(r,v) do { outb((r), 0x279); udelay(10); outb((v), 0xa79); } while (0) 405 406 static inline void rwa010_unlock(void) 407 { 408 int i; 409 410 WRITE_RWA(2, 2); 411 mdelay(10); 412 413 for (i = 0; i < sizeof(rwa_unlock); i++) { 414 outb(rwa_unlock[i], 0x279); 415 udelay(10); 416 } 417 } 418 419 static inline void rwa010_read_ident(void) 420 { 421 unsigned char si[9]; 422 int i, j; 423 424 WRITE_RWA(3, 0); 425 WRITE_RWA(0, 128); 426 427 outb(1, 0x279); 428 429 mdelay(1); 430 431 dprintk("Identifier: "); 432 for (i = 0; i < 9; i++) { 433 si[i] = 0; 434 for (j = 0; j < 8; j++) { 435 int bit; 436 udelay(250); 437 inb(0x203); 438 udelay(250); 439 bit = inb(0x203); 440 dprintk("%02X ", bit); 441 bit = (bit == 0xaa) ? 1 : 0; 442 si[i] |= bit << j; 443 } 444 dprintk("(%02X) ", si[i]); 445 } 446 dprintk("\n"); 447 } 448 449 static inline void rwa010_global_init(void) 450 { 451 WRITE_RWA(6, 2); // Assign a card no = 2 452 453 dprintk("Card no = %d\n", inb(0x203)); 454 455 /* disable the modem section of the chip */ 456 WRITE_RWA(7, 3); 457 WRITE_RWA(0x30, 0); 458 459 /* disable the cdrom section of the chip */ 460 WRITE_RWA(7, 4); 461 WRITE_RWA(0x30, 0); 462 463 /* disable the MPU-401 section of the chip */ 464 WRITE_RWA(7, 2); 465 WRITE_RWA(0x30, 0); 466 } 467 468 static inline void rwa010_game_port_init(void) 469 { 470 int i; 471 472 WRITE_RWA(7, 5); 473 474 dprintk("Slider base: "); 475 WRITE_RWA(0x61, 1); 476 i = inb(0x203); 477 478 WRITE_RWA(0x60, 2); 479 dprintk("%02X%02X (201)\n", inb(0x203), i); 480 481 WRITE_RWA(0x30, 1); 482 } 483 484 static inline void rwa010_waveartist_init(int base, int irq, int dma) 485 { 486 int i; 487 488 WRITE_RWA(7, 0); 489 490 dprintk("WaveArtist base: "); 491 WRITE_RWA(0x61, base & 255); 492 i = inb(0x203); 493 494 WRITE_RWA(0x60, base >> 8); 495 dprintk("%02X%02X (%X),", inb(0x203), i, base); 496 497 WRITE_RWA(0x70, irq); 498 dprintk(" irq: %d (%d),", inb(0x203), irq); 499 500 WRITE_RWA(0x74, dma); 501 dprintk(" dma: %d (%d)\n", inb(0x203), dma); 502 503 WRITE_RWA(0x30, 1); 504 } 505 506 static inline void rwa010_soundblaster_init(int sb_base, int al_base, int irq, int dma) 507 { 508 int i; 509 510 WRITE_RWA(7, 1); 511 512 dprintk("SoundBlaster base: "); 513 WRITE_RWA(0x61, sb_base & 255); 514 i = inb(0x203); 515 516 WRITE_RWA(0x60, sb_base >> 8); 517 dprintk("%02X%02X (%X),", inb(0x203), i, sb_base); 518 519 dprintk(" irq: "); 520 WRITE_RWA(0x70, irq); 521 dprintk("%d (%d),", inb(0x203), irq); 522 523 dprintk(" 8-bit DMA: "); 524 WRITE_RWA(0x74, dma); 525 dprintk("%d (%d)\n", inb(0x203), dma); 526 527 dprintk("AdLib base: "); 528 WRITE_RWA(0x63, al_base & 255); 529 i = inb(0x203); 530 531 WRITE_RWA(0x62, al_base >> 8); 532 dprintk("%02X%02X (%X)\n", inb(0x203), i, al_base); 533 534 WRITE_RWA(0x30, 1); 535 } 536 537 static void rwa010_soundblaster_reset(void) 538 { 539 int i; 540 541 outb(1, 0x226); 542 udelay(3); 543 outb(0, 0x226); 544 545 for (i = 0; i < 5; i++) { 546 if (inb(0x22e) & 0x80) 547 break; 548 mdelay(1); 549 } 550 if (i == 5) 551 printk("SoundBlaster: DSP reset failed\n"); 552 553 dprintk("SoundBlaster DSP reset: %02X (AA)\n", inb(0x22a)); 554 555 for (i = 0; i < 5; i++) { 556 if ((inb(0x22c) & 0x80) == 0) 557 break; 558 mdelay(1); 559 } 560 561 if (i == 5) 562 printk("SoundBlaster: DSP not ready\n"); 563 else { 564 outb(0xe1, 0x22c); 565 566 dprintk("SoundBlaster DSP id: "); 567 i = inb(0x22a); 568 udelay(1); 569 i |= inb(0x22a) << 8; 570 dprintk("%04X\n", i); 571 572 for (i = 0; i < 5; i++) { 573 if ((inb(0x22c) & 0x80) == 0) 574 break; 575 mdelay(1); 576 } 577 578 if (i == 5) 579 printk("SoundBlaster: could not turn speaker off\n"); 580 581 outb(0xd3, 0x22c); 582 } 583 584 /* turn on OPL3 */ 585 outb(5, 0x38a); 586 outb(1, 0x38b); 587 } 588 589 static void __init rwa010_init(void) 590 { 591 rwa010_unlock(); 592 rwa010_read_ident(); 593 rwa010_global_init(); 594 rwa010_game_port_init(); 595 rwa010_waveartist_init(0x250, 3, 7); 596 rwa010_soundblaster_init(0x220, 0x388, 3, 1); 597 rwa010_soundblaster_reset(); 598 } 599 600 EXPORT_SYMBOL(gpio_lock); 601 EXPORT_SYMBOL(gpio_modify_op); 602 EXPORT_SYMBOL(gpio_modify_io); 603 EXPORT_SYMBOL(cpld_modify); 604 605 /* 606 * Initialise any other hardware after we've got the PCI bus 607 * initialised. We may need the PCI bus to talk to this other 608 * hardware. 609 */ 610 static int __init nw_hw_init(void) 611 { 612 if (machine_is_netwinder()) { 613 unsigned long flags; 614 615 wb977_init(); 616 cpld_init(); 617 rwa010_init(); 618 619 spin_lock_irqsave(&gpio_lock, flags); 620 gpio_modify_op(GPIO_RED_LED|GPIO_GREEN_LED, DEFAULT_LEDS); 621 spin_unlock_irqrestore(&gpio_lock, flags); 622 } 623 return 0; 624 } 625 626 __initcall(nw_hw_init); 627 628 /* 629 * Older NeTTroms either do not provide a parameters 630 * page, or they don't supply correct information in 631 * the parameter page. 632 */ 633 static void __init 634 fixup_netwinder(struct machine_desc *desc, struct tag *tags, 635 char **cmdline, struct meminfo *mi) 636 { 637 #ifdef CONFIG_ISAPNP 638 extern int isapnp_disable; 639 640 /* 641 * We must not use the kernels ISAPnP code 642 * on the NetWinder - it will reset the settings 643 * for the WaveArtist chip and render it inoperable. 644 */ 645 isapnp_disable = 1; 646 #endif 647 } 648 649 MACHINE_START(NETWINDER, "Rebel-NetWinder") 650 MAINTAINER("Russell King/Rebel.com") 651 BOOT_MEM(0x00000000, DC21285_ARMCSR_BASE, 0xfe000000) 652 BOOT_PARAMS(0x00000100) 653 VIDEO(0x000a0000, 0x000bffff) 654 DISABLE_PARPORT(0) 655 DISABLE_PARPORT(2) 656 FIXUP(fixup_netwinder) 657 MAPIO(footbridge_map_io) 658 INITIRQ(footbridge_init_irq) 659 .timer = &isa_timer, 660 MACHINE_END 661