1 /* 2 * linux/arch/arm/mach-footbridge/common.c 3 * 4 * Copyright (C) 1998-2000 Russell King, Dave Gilbert. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/module.h> 11 #include <linux/types.h> 12 #include <linux/mm.h> 13 #include <linux/ioport.h> 14 #include <linux/list.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/spinlock.h> 18 19 #include <asm/pgtable.h> 20 #include <asm/page.h> 21 #include <asm/irq.h> 22 #include <asm/mach-types.h> 23 #include <asm/setup.h> 24 #include <asm/hardware/dec21285.h> 25 26 #include <asm/mach/irq.h> 27 #include <asm/mach/map.h> 28 29 #include "common.h" 30 31 unsigned int mem_fclk_21285 = 50000000; 32 33 EXPORT_SYMBOL(mem_fclk_21285); 34 35 static void __init early_fclk(char **arg) 36 { 37 mem_fclk_21285 = simple_strtoul(*arg, arg, 0); 38 } 39 40 __early_param("mem_fclk_21285=", early_fclk); 41 42 static int __init parse_tag_memclk(const struct tag *tag) 43 { 44 mem_fclk_21285 = tag->u.memclk.fmemclk; 45 return 0; 46 } 47 48 __tagtable(ATAG_MEMCLK, parse_tag_memclk); 49 50 /* 51 * Footbridge IRQ translation table 52 * Converts from our IRQ numbers into FootBridge masks 53 */ 54 static const int fb_irq_mask[] = { 55 IRQ_MASK_UART_RX, /* 0 */ 56 IRQ_MASK_UART_TX, /* 1 */ 57 IRQ_MASK_TIMER1, /* 2 */ 58 IRQ_MASK_TIMER2, /* 3 */ 59 IRQ_MASK_TIMER3, /* 4 */ 60 IRQ_MASK_IN0, /* 5 */ 61 IRQ_MASK_IN1, /* 6 */ 62 IRQ_MASK_IN2, /* 7 */ 63 IRQ_MASK_IN3, /* 8 */ 64 IRQ_MASK_DOORBELLHOST, /* 9 */ 65 IRQ_MASK_DMA1, /* 10 */ 66 IRQ_MASK_DMA2, /* 11 */ 67 IRQ_MASK_PCI, /* 12 */ 68 IRQ_MASK_SDRAMPARITY, /* 13 */ 69 IRQ_MASK_I2OINPOST, /* 14 */ 70 IRQ_MASK_PCI_ABORT, /* 15 */ 71 IRQ_MASK_PCI_SERR, /* 16 */ 72 IRQ_MASK_DISCARD_TIMER, /* 17 */ 73 IRQ_MASK_PCI_DPERR, /* 18 */ 74 IRQ_MASK_PCI_PERR, /* 19 */ 75 }; 76 77 static void fb_mask_irq(unsigned int irq) 78 { 79 *CSR_IRQ_DISABLE = fb_irq_mask[_DC21285_INR(irq)]; 80 } 81 82 static void fb_unmask_irq(unsigned int irq) 83 { 84 *CSR_IRQ_ENABLE = fb_irq_mask[_DC21285_INR(irq)]; 85 } 86 87 static struct irq_chip fb_chip = { 88 .ack = fb_mask_irq, 89 .mask = fb_mask_irq, 90 .unmask = fb_unmask_irq, 91 }; 92 93 static void __init __fb_init_irq(void) 94 { 95 unsigned int irq; 96 97 /* 98 * setup DC21285 IRQs 99 */ 100 *CSR_IRQ_DISABLE = -1; 101 *CSR_FIQ_DISABLE = -1; 102 103 for (irq = _DC21285_IRQ(0); irq < _DC21285_IRQ(20); irq++) { 104 set_irq_chip(irq, &fb_chip); 105 set_irq_handler(irq, handle_level_irq); 106 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); 107 } 108 } 109 110 void __init footbridge_init_irq(void) 111 { 112 __fb_init_irq(); 113 114 if (!footbridge_cfn_mode()) 115 return; 116 117 if (machine_is_ebsa285()) 118 /* The following is dependent on which slot 119 * you plug the Southbridge card into. We 120 * currently assume that you plug it into 121 * the right-hand most slot. 122 */ 123 isa_init_irq(IRQ_PCI); 124 125 if (machine_is_cats()) 126 isa_init_irq(IRQ_IN2); 127 128 if (machine_is_netwinder()) 129 isa_init_irq(IRQ_IN3); 130 } 131 132 /* 133 * Common mapping for all systems. Note that the outbound write flush is 134 * commented out since there is a "No Fix" problem with it. Not mapping 135 * it means that we have extra bullet protection on our feet. 136 */ 137 static struct map_desc fb_common_io_desc[] __initdata = { 138 { 139 .virtual = ARMCSR_BASE, 140 .pfn = __phys_to_pfn(DC21285_ARMCSR_BASE), 141 .length = ARMCSR_SIZE, 142 .type = MT_DEVICE, 143 }, { 144 .virtual = XBUS_BASE, 145 .pfn = __phys_to_pfn(0x40000000), 146 .length = XBUS_SIZE, 147 .type = MT_DEVICE, 148 } 149 }; 150 151 /* 152 * The mapping when the footbridge is in host mode. We don't map any of 153 * this when we are in add-in mode. 154 */ 155 static struct map_desc ebsa285_host_io_desc[] __initdata = { 156 #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST) 157 { 158 .virtual = PCIMEM_BASE, 159 .pfn = __phys_to_pfn(DC21285_PCI_MEM), 160 .length = PCIMEM_SIZE, 161 .type = MT_DEVICE, 162 }, { 163 .virtual = PCICFG0_BASE, 164 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG), 165 .length = PCICFG0_SIZE, 166 .type = MT_DEVICE, 167 }, { 168 .virtual = PCICFG1_BASE, 169 .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG), 170 .length = PCICFG1_SIZE, 171 .type = MT_DEVICE, 172 }, { 173 .virtual = PCIIACK_BASE, 174 .pfn = __phys_to_pfn(DC21285_PCI_IACK), 175 .length = PCIIACK_SIZE, 176 .type = MT_DEVICE, 177 }, { 178 .virtual = PCIO_BASE, 179 .pfn = __phys_to_pfn(DC21285_PCI_IO), 180 .length = PCIO_SIZE, 181 .type = MT_DEVICE, 182 }, 183 #endif 184 }; 185 186 void __init footbridge_map_io(void) 187 { 188 /* 189 * Set up the common mapping first; we need this to 190 * determine whether we're in host mode or not. 191 */ 192 iotable_init(fb_common_io_desc, ARRAY_SIZE(fb_common_io_desc)); 193 194 /* 195 * Now, work out what we've got to map in addition on this 196 * platform. 197 */ 198 if (footbridge_cfn_mode()) 199 iotable_init(ebsa285_host_io_desc, ARRAY_SIZE(ebsa285_host_io_desc)); 200 } 201 202 #ifdef CONFIG_FOOTBRIDGE_ADDIN 203 204 /* 205 * These two functions convert virtual addresses to PCI addresses and PCI 206 * addresses to virtual addresses. Note that it is only legal to use these 207 * on memory obtained via get_zeroed_page or kmalloc. 208 */ 209 unsigned long __virt_to_bus(unsigned long res) 210 { 211 WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory); 212 213 return (res - PAGE_OFFSET) + (*CSR_PCISDRAMBASE & 0xfffffff0); 214 } 215 EXPORT_SYMBOL(__virt_to_bus); 216 217 unsigned long __bus_to_virt(unsigned long res) 218 { 219 res -= (*CSR_PCISDRAMBASE & 0xfffffff0); 220 res += PAGE_OFFSET; 221 222 WARN_ON(res < PAGE_OFFSET || res >= (unsigned long)high_memory); 223 224 return res; 225 } 226 EXPORT_SYMBOL(__bus_to_virt); 227 228 #endif 229