1c9347101SJongpill Lee /* 2c9347101SJongpill Lee * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. 383014579SKukjin Kim * http://www.samsung.com 483014579SKukjin Kim * 5c9347101SJongpill Lee * EXYNOS - Power Management support 683014579SKukjin Kim * 783014579SKukjin Kim * Based on arch/arm/mach-s3c2410/pm.c 883014579SKukjin Kim * Copyright (c) 2006 Simtec Electronics 983014579SKukjin Kim * Ben Dooks <ben@simtec.co.uk> 1083014579SKukjin Kim * 1183014579SKukjin Kim * This program is free software; you can redistribute it and/or modify 1283014579SKukjin Kim * it under the terms of the GNU General Public License version 2 as 1383014579SKukjin Kim * published by the Free Software Foundation. 1483014579SKukjin Kim */ 1583014579SKukjin Kim 1683014579SKukjin Kim #include <linux/init.h> 1783014579SKukjin Kim #include <linux/suspend.h> 1883014579SKukjin Kim #include <linux/syscore_ops.h> 1983014579SKukjin Kim #include <linux/io.h> 20dd8ac696STomasz Figa #include <linux/irqchip/arm-gic.h> 2183014579SKukjin Kim #include <linux/err.h> 2283014579SKukjin Kim #include <linux/clk.h> 2383014579SKukjin Kim 2483014579SKukjin Kim #include <asm/cacheflush.h> 2583014579SKukjin Kim #include <asm/hardware/cache-l2x0.h> 2663b870f1SShawn Guo #include <asm/smp_scu.h> 27d710aa31STomasz Figa #include <asm/suspend.h> 2883014579SKukjin Kim 2983014579SKukjin Kim #include <plat/cpu.h> 30d710aa31STomasz Figa #include <plat/pm-common.h> 3183014579SKukjin Kim #include <plat/pll.h> 3283014579SKukjin Kim #include <plat/regs-srom.h> 3383014579SKukjin Kim 349c9239afSKukjin Kim #include <mach/map.h> 35ccd458c1SKukjin Kim 36ccd458c1SKukjin Kim #include "common.h" 3765c9a853SKukjin Kim #include "regs-pmu.h" 3883014579SKukjin Kim 39dd8ac696STomasz Figa /** 40dd8ac696STomasz Figa * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping 41dd8ac696STomasz Figa * @hwirq: Hardware IRQ signal of the GIC 42dd8ac696STomasz Figa * @mask: Mask in PMU wake-up mask register 43dd8ac696STomasz Figa */ 44dd8ac696STomasz Figa struct exynos_wkup_irq { 45dd8ac696STomasz Figa unsigned int hwirq; 46dd8ac696STomasz Figa u32 mask; 47dd8ac696STomasz Figa }; 48dd8ac696STomasz Figa 4986ffb0e8SAbhilash Kesavan static struct sleep_save exynos5_sys_save[] = { 5086ffb0e8SAbhilash Kesavan SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), 5186ffb0e8SAbhilash Kesavan }; 5286ffb0e8SAbhilash Kesavan 53c9347101SJongpill Lee static struct sleep_save exynos_core_save[] = { 5483014579SKukjin Kim /* SROM side */ 5583014579SKukjin Kim SAVE_ITEM(S5P_SROM_BW), 5683014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC0), 5783014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC1), 5883014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC2), 5983014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC3), 6083014579SKukjin Kim }; 6183014579SKukjin Kim 62dd8ac696STomasz Figa /* 63dd8ac696STomasz Figa * GIC wake-up support 64dd8ac696STomasz Figa */ 65dd8ac696STomasz Figa 66d710aa31STomasz Figa static u32 exynos_irqwake_intmask = 0xffffffff; 6783014579SKukjin Kim 68dd8ac696STomasz Figa static const struct exynos_wkup_irq exynos4_wkup_irq[] = { 69dd8ac696STomasz Figa { 76, BIT(1) }, /* RTC alarm */ 70dd8ac696STomasz Figa { 77, BIT(2) }, /* RTC tick */ 71dd8ac696STomasz Figa { /* sentinel */ }, 72dd8ac696STomasz Figa }; 73dd8ac696STomasz Figa 74dd8ac696STomasz Figa static const struct exynos_wkup_irq exynos5250_wkup_irq[] = { 75dd8ac696STomasz Figa { 75, BIT(1) }, /* RTC alarm */ 76dd8ac696STomasz Figa { 76, BIT(2) }, /* RTC tick */ 77dd8ac696STomasz Figa { /* sentinel */ }, 78dd8ac696STomasz Figa }; 79dd8ac696STomasz Figa 80dd8ac696STomasz Figa static int exynos_irq_set_wake(struct irq_data *data, unsigned int state) 81dd8ac696STomasz Figa { 82dd8ac696STomasz Figa const struct exynos_wkup_irq *wkup_irq; 83dd8ac696STomasz Figa 84dd8ac696STomasz Figa if (soc_is_exynos5250()) 85dd8ac696STomasz Figa wkup_irq = exynos5250_wkup_irq; 86dd8ac696STomasz Figa else 87dd8ac696STomasz Figa wkup_irq = exynos4_wkup_irq; 88dd8ac696STomasz Figa 89dd8ac696STomasz Figa while (wkup_irq->mask) { 90dd8ac696STomasz Figa if (wkup_irq->hwirq == data->hwirq) { 91dd8ac696STomasz Figa if (!state) 92dd8ac696STomasz Figa exynos_irqwake_intmask |= wkup_irq->mask; 93dd8ac696STomasz Figa else 94dd8ac696STomasz Figa exynos_irqwake_intmask &= ~wkup_irq->mask; 95dd8ac696STomasz Figa return 0; 96dd8ac696STomasz Figa } 97dd8ac696STomasz Figa ++wkup_irq; 98dd8ac696STomasz Figa } 99dd8ac696STomasz Figa 100dd8ac696STomasz Figa return -ENOENT; 101dd8ac696STomasz Figa } 102dd8ac696STomasz Figa 10383014579SKukjin Kim /* For Cortex-A9 Diagnostic and Power control register */ 10483014579SKukjin Kim static unsigned int save_arm_register[2]; 10583014579SKukjin Kim 106c9347101SJongpill Lee static int exynos_cpu_suspend(unsigned long arg) 10783014579SKukjin Kim { 10860e49ca6SJongpill Lee #ifdef CONFIG_CACHE_L2X0 10983014579SKukjin Kim outer_flush_all(); 11060e49ca6SJongpill Lee #endif 11183014579SKukjin Kim 112573e5bbeSAbhilash Kesavan if (soc_is_exynos5250()) 113573e5bbeSAbhilash Kesavan flush_cache_all(); 114573e5bbeSAbhilash Kesavan 11583014579SKukjin Kim /* issue the standby signal into the pm unit. */ 11683014579SKukjin Kim cpu_do_idle(); 11783014579SKukjin Kim 118d3fcacf5SAbhilash Kesavan pr_info("Failed to suspend the system\n"); 119d3fcacf5SAbhilash Kesavan return 1; /* Aborting suspend */ 12083014579SKukjin Kim } 12183014579SKukjin Kim 122c9347101SJongpill Lee static void exynos_pm_prepare(void) 12383014579SKukjin Kim { 12460e49ca6SJongpill Lee unsigned int tmp; 12583014579SKukjin Kim 126d710aa31STomasz Figa /* Set wake-up mask registers */ 127d710aa31STomasz Figa __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK); 128d710aa31STomasz Figa __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK); 129d710aa31STomasz Figa 130c9347101SJongpill Lee s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 13160e49ca6SJongpill Lee 132e11d919eSTomasz Figa if (soc_is_exynos5250()) { 13386ffb0e8SAbhilash Kesavan s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save)); 13460e49ca6SJongpill Lee /* Disable USE_RETENTION of JPEG_MEM_OPTION */ 13560e49ca6SJongpill Lee tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); 13660e49ca6SJongpill Lee tmp &= ~EXYNOS5_OPTION_USE_RETENTION; 13760e49ca6SJongpill Lee __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION); 13860e49ca6SJongpill Lee } 13983014579SKukjin Kim 14083014579SKukjin Kim /* Set value of power down register for sleep mode */ 14183014579SKukjin Kim 1427d44d2baSJongpill Lee exynos_sys_powerdown_conf(SYS_SLEEP); 14383014579SKukjin Kim __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1); 14483014579SKukjin Kim 14583014579SKukjin Kim /* ensure at least INFORM0 has the resume address */ 14683014579SKukjin Kim 147d710aa31STomasz Figa __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0); 14883014579SKukjin Kim } 14983014579SKukjin Kim 150c9347101SJongpill Lee static int exynos_pm_suspend(void) 15183014579SKukjin Kim { 15283014579SKukjin Kim unsigned long tmp; 15383014579SKukjin Kim 15483014579SKukjin Kim /* Setting Central Sequence Register for power down mode */ 15583014579SKukjin Kim 15683014579SKukjin Kim tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); 15783014579SKukjin Kim tmp &= ~S5P_CENTRAL_LOWPWR_CFG; 15883014579SKukjin Kim __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); 15983014579SKukjin Kim 16060e49ca6SJongpill Lee /* Setting SEQ_OPTION register */ 16183014579SKukjin Kim 16260e49ca6SJongpill Lee tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); 16360e49ca6SJongpill Lee __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); 16460e49ca6SJongpill Lee 16560e49ca6SJongpill Lee if (!soc_is_exynos5250()) { 16683014579SKukjin Kim /* Save Power control register */ 16783014579SKukjin Kim asm ("mrc p15, 0, %0, c15, c0, 0" 16883014579SKukjin Kim : "=r" (tmp) : : "cc"); 16983014579SKukjin Kim save_arm_register[0] = tmp; 17083014579SKukjin Kim 17183014579SKukjin Kim /* Save Diagnostic register */ 17283014579SKukjin Kim asm ("mrc p15, 0, %0, c15, c0, 1" 17383014579SKukjin Kim : "=r" (tmp) : : "cc"); 17483014579SKukjin Kim save_arm_register[1] = tmp; 17560e49ca6SJongpill Lee } 17683014579SKukjin Kim 17783014579SKukjin Kim return 0; 17883014579SKukjin Kim } 17983014579SKukjin Kim 180c9347101SJongpill Lee static void exynos_pm_resume(void) 18183014579SKukjin Kim { 18283014579SKukjin Kim unsigned long tmp; 18383014579SKukjin Kim 18483014579SKukjin Kim /* 18583014579SKukjin Kim * If PMU failed while entering sleep mode, WFI will be 18683014579SKukjin Kim * ignored by PMU and then exiting cpu_do_idle(). 18783014579SKukjin Kim * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically 18883014579SKukjin Kim * in this situation. 18983014579SKukjin Kim */ 19083014579SKukjin Kim tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); 19183014579SKukjin Kim if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) { 19283014579SKukjin Kim tmp |= S5P_CENTRAL_LOWPWR_CFG; 19383014579SKukjin Kim __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); 194d3fcacf5SAbhilash Kesavan /* clear the wakeup state register */ 195d3fcacf5SAbhilash Kesavan __raw_writel(0x0, S5P_WAKEUP_STAT); 19683014579SKukjin Kim /* No need to perform below restore code */ 19783014579SKukjin Kim goto early_wakeup; 19883014579SKukjin Kim } 19960e49ca6SJongpill Lee if (!soc_is_exynos5250()) { 20083014579SKukjin Kim /* Restore Power control register */ 20183014579SKukjin Kim tmp = save_arm_register[0]; 20283014579SKukjin Kim asm volatile ("mcr p15, 0, %0, c15, c0, 0" 20383014579SKukjin Kim : : "r" (tmp) 20483014579SKukjin Kim : "cc"); 20583014579SKukjin Kim 20683014579SKukjin Kim /* Restore Diagnostic register */ 20783014579SKukjin Kim tmp = save_arm_register[1]; 20883014579SKukjin Kim asm volatile ("mcr p15, 0, %0, c15, c0, 1" 20983014579SKukjin Kim : : "r" (tmp) 21083014579SKukjin Kim : "cc"); 21160e49ca6SJongpill Lee } 21283014579SKukjin Kim 21383014579SKukjin Kim /* For release retention */ 21483014579SKukjin Kim 21583014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION); 21683014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION); 21783014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION); 21883014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION); 21983014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION); 22083014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION); 22183014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION); 22283014579SKukjin Kim 22386ffb0e8SAbhilash Kesavan if (soc_is_exynos5250()) 22486ffb0e8SAbhilash Kesavan s3c_pm_do_restore(exynos5_sys_save, 22586ffb0e8SAbhilash Kesavan ARRAY_SIZE(exynos5_sys_save)); 22686ffb0e8SAbhilash Kesavan 227c9347101SJongpill Lee s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 22883014579SKukjin Kim 229e11d919eSTomasz Figa if (IS_ENABLED(CONFIG_SMP) && !soc_is_exynos5250()) 23063b870f1SShawn Guo scu_enable(S5P_VA_SCU); 23183014579SKukjin Kim 23283014579SKukjin Kim early_wakeup: 233ebee8541SInderpal Singh 234ebee8541SInderpal Singh /* Clear SLEEP mode set in INFORM1 */ 235ebee8541SInderpal Singh __raw_writel(0x0, S5P_INFORM1); 236ebee8541SInderpal Singh 23783014579SKukjin Kim return; 23883014579SKukjin Kim } 23983014579SKukjin Kim 240c9347101SJongpill Lee static struct syscore_ops exynos_pm_syscore_ops = { 241c9347101SJongpill Lee .suspend = exynos_pm_suspend, 242c9347101SJongpill Lee .resume = exynos_pm_resume, 24383014579SKukjin Kim }; 24483014579SKukjin Kim 245d710aa31STomasz Figa /* 246d710aa31STomasz Figa * Suspend Ops 247d710aa31STomasz Figa */ 248d710aa31STomasz Figa 249d710aa31STomasz Figa static int exynos_suspend_enter(suspend_state_t state) 250d710aa31STomasz Figa { 251d710aa31STomasz Figa int ret; 252d710aa31STomasz Figa 253d710aa31STomasz Figa s3c_pm_debug_init(); 254d710aa31STomasz Figa 255d710aa31STomasz Figa S3C_PMDBG("%s: suspending the system...\n", __func__); 256d710aa31STomasz Figa 257d710aa31STomasz Figa S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__, 258d710aa31STomasz Figa exynos_irqwake_intmask, exynos_get_eint_wake_mask()); 259d710aa31STomasz Figa 260d710aa31STomasz Figa if (exynos_irqwake_intmask == -1U 261d710aa31STomasz Figa && exynos_get_eint_wake_mask() == -1U) { 262d710aa31STomasz Figa pr_err("%s: No wake-up sources!\n", __func__); 263d710aa31STomasz Figa pr_err("%s: Aborting sleep\n", __func__); 264d710aa31STomasz Figa return -EINVAL; 265d710aa31STomasz Figa } 266d710aa31STomasz Figa 267d710aa31STomasz Figa s3c_pm_save_uarts(); 268d710aa31STomasz Figa exynos_pm_prepare(); 269d710aa31STomasz Figa flush_cache_all(); 270d710aa31STomasz Figa s3c_pm_check_store(); 271d710aa31STomasz Figa 272d710aa31STomasz Figa ret = cpu_suspend(0, exynos_cpu_suspend); 273d710aa31STomasz Figa if (ret) 274d710aa31STomasz Figa return ret; 275d710aa31STomasz Figa 276d710aa31STomasz Figa s3c_pm_restore_uarts(); 277d710aa31STomasz Figa 278d710aa31STomasz Figa S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, 279d710aa31STomasz Figa __raw_readl(S5P_WAKEUP_STAT)); 280d710aa31STomasz Figa 281d710aa31STomasz Figa s3c_pm_check_restore(); 282d710aa31STomasz Figa 283d710aa31STomasz Figa S3C_PMDBG("%s: resuming the system...\n", __func__); 284d710aa31STomasz Figa 285d710aa31STomasz Figa return 0; 286d710aa31STomasz Figa } 287d710aa31STomasz Figa 288d710aa31STomasz Figa static int exynos_suspend_prepare(void) 289d710aa31STomasz Figa { 290d710aa31STomasz Figa s3c_pm_check_prepare(); 291d710aa31STomasz Figa 292d710aa31STomasz Figa return 0; 293d710aa31STomasz Figa } 294d710aa31STomasz Figa 295d710aa31STomasz Figa static void exynos_suspend_finish(void) 296d710aa31STomasz Figa { 297d710aa31STomasz Figa s3c_pm_check_cleanup(); 298d710aa31STomasz Figa } 299d710aa31STomasz Figa 300d710aa31STomasz Figa static const struct platform_suspend_ops exynos_suspend_ops = { 301d710aa31STomasz Figa .enter = exynos_suspend_enter, 302d710aa31STomasz Figa .prepare = exynos_suspend_prepare, 303d710aa31STomasz Figa .finish = exynos_suspend_finish, 304d710aa31STomasz Figa .valid = suspend_valid_only_mem, 305d710aa31STomasz Figa }; 306d710aa31STomasz Figa 307559ba237STomasz Figa void __init exynos_pm_init(void) 30883014579SKukjin Kim { 309559ba237STomasz Figa u32 tmp; 310559ba237STomasz Figa 311dd8ac696STomasz Figa /* Platform-specific GIC callback */ 312dd8ac696STomasz Figa gic_arch_extn.irq_set_wake = exynos_irq_set_wake; 313dd8ac696STomasz Figa 314559ba237STomasz Figa /* All wakeup disable */ 315559ba237STomasz Figa tmp = __raw_readl(S5P_WAKEUP_MASK); 316559ba237STomasz Figa tmp |= ((0xFF << 8) | (0x1F << 1)); 317559ba237STomasz Figa __raw_writel(tmp, S5P_WAKEUP_MASK); 318e085cad6SKukjin Kim 319c9347101SJongpill Lee register_syscore_ops(&exynos_pm_syscore_ops); 320d710aa31STomasz Figa suspend_set_ops(&exynos_suspend_ops); 32183014579SKukjin Kim } 322