1c9347101SJongpill Lee /* 2c9347101SJongpill Lee * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. 383014579SKukjin Kim * http://www.samsung.com 483014579SKukjin Kim * 5c9347101SJongpill Lee * EXYNOS - Power Management support 683014579SKukjin Kim * 783014579SKukjin Kim * Based on arch/arm/mach-s3c2410/pm.c 883014579SKukjin Kim * Copyright (c) 2006 Simtec Electronics 983014579SKukjin Kim * Ben Dooks <ben@simtec.co.uk> 1083014579SKukjin Kim * 1183014579SKukjin Kim * This program is free software; you can redistribute it and/or modify 1283014579SKukjin Kim * it under the terms of the GNU General Public License version 2 as 1383014579SKukjin Kim * published by the Free Software Foundation. 1483014579SKukjin Kim */ 1583014579SKukjin Kim 1683014579SKukjin Kim #include <linux/init.h> 1783014579SKukjin Kim #include <linux/suspend.h> 1883014579SKukjin Kim #include <linux/syscore_ops.h> 1985f9f908SDaniel Lezcano #include <linux/cpu_pm.h> 2083014579SKukjin Kim #include <linux/io.h> 21dd8ac696STomasz Figa #include <linux/irqchip/arm-gic.h> 2283014579SKukjin Kim #include <linux/err.h> 2383014579SKukjin Kim #include <linux/clk.h> 2483014579SKukjin Kim 2583014579SKukjin Kim #include <asm/cacheflush.h> 2683014579SKukjin Kim #include <asm/hardware/cache-l2x0.h> 2763b870f1SShawn Guo #include <asm/smp_scu.h> 28d710aa31STomasz Figa #include <asm/suspend.h> 2983014579SKukjin Kim 3083014579SKukjin Kim #include <plat/cpu.h> 31d710aa31STomasz Figa #include <plat/pm-common.h> 3283014579SKukjin Kim #include <plat/pll.h> 3383014579SKukjin Kim #include <plat/regs-srom.h> 3483014579SKukjin Kim 359c9239afSKukjin Kim #include <mach/map.h> 36ccd458c1SKukjin Kim 37ccd458c1SKukjin Kim #include "common.h" 3865c9a853SKukjin Kim #include "regs-pmu.h" 3983014579SKukjin Kim 40dd8ac696STomasz Figa /** 41dd8ac696STomasz Figa * struct exynos_wkup_irq - Exynos GIC to PMU IRQ mapping 42dd8ac696STomasz Figa * @hwirq: Hardware IRQ signal of the GIC 43dd8ac696STomasz Figa * @mask: Mask in PMU wake-up mask register 44dd8ac696STomasz Figa */ 45dd8ac696STomasz Figa struct exynos_wkup_irq { 46dd8ac696STomasz Figa unsigned int hwirq; 47dd8ac696STomasz Figa u32 mask; 48dd8ac696STomasz Figa }; 49dd8ac696STomasz Figa 5086ffb0e8SAbhilash Kesavan static struct sleep_save exynos5_sys_save[] = { 5186ffb0e8SAbhilash Kesavan SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), 5286ffb0e8SAbhilash Kesavan }; 5386ffb0e8SAbhilash Kesavan 54c9347101SJongpill Lee static struct sleep_save exynos_core_save[] = { 5583014579SKukjin Kim /* SROM side */ 5683014579SKukjin Kim SAVE_ITEM(S5P_SROM_BW), 5783014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC0), 5883014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC1), 5983014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC2), 6083014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC3), 6183014579SKukjin Kim }; 6283014579SKukjin Kim 63dd8ac696STomasz Figa /* 64dd8ac696STomasz Figa * GIC wake-up support 65dd8ac696STomasz Figa */ 66dd8ac696STomasz Figa 67d710aa31STomasz Figa static u32 exynos_irqwake_intmask = 0xffffffff; 6883014579SKukjin Kim 69dd8ac696STomasz Figa static const struct exynos_wkup_irq exynos4_wkup_irq[] = { 70dd8ac696STomasz Figa { 76, BIT(1) }, /* RTC alarm */ 71dd8ac696STomasz Figa { 77, BIT(2) }, /* RTC tick */ 72dd8ac696STomasz Figa { /* sentinel */ }, 73dd8ac696STomasz Figa }; 74dd8ac696STomasz Figa 75dd8ac696STomasz Figa static const struct exynos_wkup_irq exynos5250_wkup_irq[] = { 76dd8ac696STomasz Figa { 75, BIT(1) }, /* RTC alarm */ 77dd8ac696STomasz Figa { 76, BIT(2) }, /* RTC tick */ 78dd8ac696STomasz Figa { /* sentinel */ }, 79dd8ac696STomasz Figa }; 80dd8ac696STomasz Figa 81dd8ac696STomasz Figa static int exynos_irq_set_wake(struct irq_data *data, unsigned int state) 82dd8ac696STomasz Figa { 83dd8ac696STomasz Figa const struct exynos_wkup_irq *wkup_irq; 84dd8ac696STomasz Figa 85dd8ac696STomasz Figa if (soc_is_exynos5250()) 86dd8ac696STomasz Figa wkup_irq = exynos5250_wkup_irq; 87dd8ac696STomasz Figa else 88dd8ac696STomasz Figa wkup_irq = exynos4_wkup_irq; 89dd8ac696STomasz Figa 90dd8ac696STomasz Figa while (wkup_irq->mask) { 91dd8ac696STomasz Figa if (wkup_irq->hwirq == data->hwirq) { 92dd8ac696STomasz Figa if (!state) 93dd8ac696STomasz Figa exynos_irqwake_intmask |= wkup_irq->mask; 94dd8ac696STomasz Figa else 95dd8ac696STomasz Figa exynos_irqwake_intmask &= ~wkup_irq->mask; 96dd8ac696STomasz Figa return 0; 97dd8ac696STomasz Figa } 98dd8ac696STomasz Figa ++wkup_irq; 99dd8ac696STomasz Figa } 100dd8ac696STomasz Figa 101dd8ac696STomasz Figa return -ENOENT; 102dd8ac696STomasz Figa } 103dd8ac696STomasz Figa 104d3af6976SLeela Krishna Amudala /** 105d3af6976SLeela Krishna Amudala * exynos_core_power_down : power down the specified cpu 106d3af6976SLeela Krishna Amudala * @cpu : the cpu to power down 107d3af6976SLeela Krishna Amudala * 108d3af6976SLeela Krishna Amudala * Power down the specified cpu. The sequence must be finished by a 109d3af6976SLeela Krishna Amudala * call to cpu_do_idle() 110d3af6976SLeela Krishna Amudala * 111d3af6976SLeela Krishna Amudala */ 112d3af6976SLeela Krishna Amudala void exynos_cpu_power_down(int cpu) 113d3af6976SLeela Krishna Amudala { 114d3af6976SLeela Krishna Amudala __raw_writel(0, EXYNOS_ARM_CORE_CONFIGURATION(cpu)); 115d3af6976SLeela Krishna Amudala } 116d3af6976SLeela Krishna Amudala 117d3af6976SLeela Krishna Amudala /** 118d3af6976SLeela Krishna Amudala * exynos_cpu_power_up : power up the specified cpu 119d3af6976SLeela Krishna Amudala * @cpu : the cpu to power up 120d3af6976SLeela Krishna Amudala * 121d3af6976SLeela Krishna Amudala * Power up the specified cpu 122d3af6976SLeela Krishna Amudala */ 123d3af6976SLeela Krishna Amudala void exynos_cpu_power_up(int cpu) 124d3af6976SLeela Krishna Amudala { 125d3af6976SLeela Krishna Amudala __raw_writel(S5P_CORE_LOCAL_PWR_EN, 126d3af6976SLeela Krishna Amudala EXYNOS_ARM_CORE_CONFIGURATION(cpu)); 127d3af6976SLeela Krishna Amudala } 128d3af6976SLeela Krishna Amudala 129d3af6976SLeela Krishna Amudala /** 130d3af6976SLeela Krishna Amudala * exynos_cpu_power_state : returns the power state of the cpu 131d3af6976SLeela Krishna Amudala * @cpu : the cpu to retrieve the power state from 132d3af6976SLeela Krishna Amudala * 133d3af6976SLeela Krishna Amudala */ 134d3af6976SLeela Krishna Amudala int exynos_cpu_power_state(int cpu) 135d3af6976SLeela Krishna Amudala { 136d3af6976SLeela Krishna Amudala return (__raw_readl(EXYNOS_ARM_CORE_STATUS(cpu)) & 137d3af6976SLeela Krishna Amudala S5P_CORE_LOCAL_PWR_EN); 138d3af6976SLeela Krishna Amudala } 139d3af6976SLeela Krishna Amudala 140096d21c6SAbhilash Kesavan /** 141096d21c6SAbhilash Kesavan * exynos_cluster_power_down : power down the specified cluster 142096d21c6SAbhilash Kesavan * @cluster : the cluster to power down 143096d21c6SAbhilash Kesavan */ 144096d21c6SAbhilash Kesavan void exynos_cluster_power_down(int cluster) 145096d21c6SAbhilash Kesavan { 146096d21c6SAbhilash Kesavan __raw_writel(0, EXYNOS_COMMON_CONFIGURATION(cluster)); 147096d21c6SAbhilash Kesavan } 148096d21c6SAbhilash Kesavan 149096d21c6SAbhilash Kesavan /** 150096d21c6SAbhilash Kesavan * exynos_cluster_power_up : power up the specified cluster 151096d21c6SAbhilash Kesavan * @cluster : the cluster to power up 152096d21c6SAbhilash Kesavan */ 153096d21c6SAbhilash Kesavan void exynos_cluster_power_up(int cluster) 154096d21c6SAbhilash Kesavan { 155096d21c6SAbhilash Kesavan __raw_writel(S5P_CORE_LOCAL_PWR_EN, 156096d21c6SAbhilash Kesavan EXYNOS_COMMON_CONFIGURATION(cluster)); 157096d21c6SAbhilash Kesavan } 158096d21c6SAbhilash Kesavan 159096d21c6SAbhilash Kesavan /** 160096d21c6SAbhilash Kesavan * exynos_cluster_power_state : returns the power state of the cluster 161096d21c6SAbhilash Kesavan * @cluster : the cluster to retrieve the power state from 162096d21c6SAbhilash Kesavan * 163096d21c6SAbhilash Kesavan */ 164096d21c6SAbhilash Kesavan int exynos_cluster_power_state(int cluster) 165096d21c6SAbhilash Kesavan { 166096d21c6SAbhilash Kesavan return (__raw_readl(EXYNOS_COMMON_STATUS(cluster)) & 167096d21c6SAbhilash Kesavan S5P_CORE_LOCAL_PWR_EN); 168096d21c6SAbhilash Kesavan } 169096d21c6SAbhilash Kesavan 17083014579SKukjin Kim /* For Cortex-A9 Diagnostic and Power control register */ 17183014579SKukjin Kim static unsigned int save_arm_register[2]; 17283014579SKukjin Kim 173309e08c4SDaniel Lezcano static void exynos_cpu_save_register(void) 174309e08c4SDaniel Lezcano { 175309e08c4SDaniel Lezcano unsigned long tmp; 176309e08c4SDaniel Lezcano 177309e08c4SDaniel Lezcano /* Save Power control register */ 178309e08c4SDaniel Lezcano asm ("mrc p15, 0, %0, c15, c0, 0" 179309e08c4SDaniel Lezcano : "=r" (tmp) : : "cc"); 180309e08c4SDaniel Lezcano 181309e08c4SDaniel Lezcano save_arm_register[0] = tmp; 182309e08c4SDaniel Lezcano 183309e08c4SDaniel Lezcano /* Save Diagnostic register */ 184309e08c4SDaniel Lezcano asm ("mrc p15, 0, %0, c15, c0, 1" 185309e08c4SDaniel Lezcano : "=r" (tmp) : : "cc"); 186309e08c4SDaniel Lezcano 187309e08c4SDaniel Lezcano save_arm_register[1] = tmp; 188309e08c4SDaniel Lezcano } 189309e08c4SDaniel Lezcano 190309e08c4SDaniel Lezcano static void exynos_cpu_restore_register(void) 191309e08c4SDaniel Lezcano { 192309e08c4SDaniel Lezcano unsigned long tmp; 193309e08c4SDaniel Lezcano 194309e08c4SDaniel Lezcano /* Restore Power control register */ 195309e08c4SDaniel Lezcano tmp = save_arm_register[0]; 196309e08c4SDaniel Lezcano 197309e08c4SDaniel Lezcano asm volatile ("mcr p15, 0, %0, c15, c0, 0" 198309e08c4SDaniel Lezcano : : "r" (tmp) 199309e08c4SDaniel Lezcano : "cc"); 200309e08c4SDaniel Lezcano 201309e08c4SDaniel Lezcano /* Restore Diagnostic register */ 202309e08c4SDaniel Lezcano tmp = save_arm_register[1]; 203309e08c4SDaniel Lezcano 204309e08c4SDaniel Lezcano asm volatile ("mcr p15, 0, %0, c15, c0, 1" 205309e08c4SDaniel Lezcano : : "r" (tmp) 206309e08c4SDaniel Lezcano : "cc"); 207309e08c4SDaniel Lezcano } 208309e08c4SDaniel Lezcano 209c9347101SJongpill Lee static int exynos_cpu_suspend(unsigned long arg) 21083014579SKukjin Kim { 21160e49ca6SJongpill Lee #ifdef CONFIG_CACHE_L2X0 21283014579SKukjin Kim outer_flush_all(); 21360e49ca6SJongpill Lee #endif 21483014579SKukjin Kim 215573e5bbeSAbhilash Kesavan if (soc_is_exynos5250()) 216573e5bbeSAbhilash Kesavan flush_cache_all(); 217573e5bbeSAbhilash Kesavan 21883014579SKukjin Kim /* issue the standby signal into the pm unit. */ 21983014579SKukjin Kim cpu_do_idle(); 22083014579SKukjin Kim 221d3fcacf5SAbhilash Kesavan pr_info("Failed to suspend the system\n"); 222d3fcacf5SAbhilash Kesavan return 1; /* Aborting suspend */ 22383014579SKukjin Kim } 22483014579SKukjin Kim 225c9347101SJongpill Lee static void exynos_pm_prepare(void) 22683014579SKukjin Kim { 22760e49ca6SJongpill Lee unsigned int tmp; 22883014579SKukjin Kim 229d710aa31STomasz Figa /* Set wake-up mask registers */ 230d710aa31STomasz Figa __raw_writel(exynos_get_eint_wake_mask(), S5P_EINT_WAKEUP_MASK); 231d710aa31STomasz Figa __raw_writel(exynos_irqwake_intmask & ~(1 << 31), S5P_WAKEUP_MASK); 232d710aa31STomasz Figa 233c9347101SJongpill Lee s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 23460e49ca6SJongpill Lee 235e11d919eSTomasz Figa if (soc_is_exynos5250()) { 23686ffb0e8SAbhilash Kesavan s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save)); 23760e49ca6SJongpill Lee /* Disable USE_RETENTION of JPEG_MEM_OPTION */ 23860e49ca6SJongpill Lee tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); 23960e49ca6SJongpill Lee tmp &= ~EXYNOS5_OPTION_USE_RETENTION; 24060e49ca6SJongpill Lee __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION); 24160e49ca6SJongpill Lee } 24283014579SKukjin Kim 24383014579SKukjin Kim /* Set value of power down register for sleep mode */ 24483014579SKukjin Kim 2457d44d2baSJongpill Lee exynos_sys_powerdown_conf(SYS_SLEEP); 24683014579SKukjin Kim __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1); 24783014579SKukjin Kim 24883014579SKukjin Kim /* ensure at least INFORM0 has the resume address */ 24983014579SKukjin Kim 250d710aa31STomasz Figa __raw_writel(virt_to_phys(exynos_cpu_resume), S5P_INFORM0); 25183014579SKukjin Kim } 25283014579SKukjin Kim 253c9347101SJongpill Lee static int exynos_pm_suspend(void) 25483014579SKukjin Kim { 25583014579SKukjin Kim unsigned long tmp; 25683014579SKukjin Kim 25783014579SKukjin Kim /* Setting Central Sequence Register for power down mode */ 25883014579SKukjin Kim 25983014579SKukjin Kim tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); 26083014579SKukjin Kim tmp &= ~S5P_CENTRAL_LOWPWR_CFG; 26183014579SKukjin Kim __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); 26283014579SKukjin Kim 26360e49ca6SJongpill Lee /* Setting SEQ_OPTION register */ 26483014579SKukjin Kim 26560e49ca6SJongpill Lee tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); 26660e49ca6SJongpill Lee __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); 26760e49ca6SJongpill Lee 268309e08c4SDaniel Lezcano if (!soc_is_exynos5250()) 269309e08c4SDaniel Lezcano exynos_cpu_save_register(); 27083014579SKukjin Kim 27183014579SKukjin Kim return 0; 27283014579SKukjin Kim } 27383014579SKukjin Kim 274c9347101SJongpill Lee static void exynos_pm_resume(void) 27583014579SKukjin Kim { 27683014579SKukjin Kim unsigned long tmp; 27783014579SKukjin Kim 27883014579SKukjin Kim /* 27983014579SKukjin Kim * If PMU failed while entering sleep mode, WFI will be 28083014579SKukjin Kim * ignored by PMU and then exiting cpu_do_idle(). 28183014579SKukjin Kim * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically 28283014579SKukjin Kim * in this situation. 28383014579SKukjin Kim */ 28483014579SKukjin Kim tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); 28583014579SKukjin Kim if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) { 28683014579SKukjin Kim tmp |= S5P_CENTRAL_LOWPWR_CFG; 28783014579SKukjin Kim __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); 288d3fcacf5SAbhilash Kesavan /* clear the wakeup state register */ 289d3fcacf5SAbhilash Kesavan __raw_writel(0x0, S5P_WAKEUP_STAT); 29083014579SKukjin Kim /* No need to perform below restore code */ 29183014579SKukjin Kim goto early_wakeup; 29283014579SKukjin Kim } 29383014579SKukjin Kim 294309e08c4SDaniel Lezcano if (!soc_is_exynos5250()) 295309e08c4SDaniel Lezcano exynos_cpu_restore_register(); 29683014579SKukjin Kim 29783014579SKukjin Kim /* For release retention */ 29883014579SKukjin Kim 29983014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION); 30083014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION); 30183014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION); 30283014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION); 30383014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION); 30483014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION); 30583014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION); 30683014579SKukjin Kim 30786ffb0e8SAbhilash Kesavan if (soc_is_exynos5250()) 30886ffb0e8SAbhilash Kesavan s3c_pm_do_restore(exynos5_sys_save, 30986ffb0e8SAbhilash Kesavan ARRAY_SIZE(exynos5_sys_save)); 31086ffb0e8SAbhilash Kesavan 311c9347101SJongpill Lee s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 31283014579SKukjin Kim 313e11d919eSTomasz Figa if (IS_ENABLED(CONFIG_SMP) && !soc_is_exynos5250()) 31463b870f1SShawn Guo scu_enable(S5P_VA_SCU); 31583014579SKukjin Kim 31683014579SKukjin Kim early_wakeup: 317ebee8541SInderpal Singh 318ebee8541SInderpal Singh /* Clear SLEEP mode set in INFORM1 */ 319ebee8541SInderpal Singh __raw_writel(0x0, S5P_INFORM1); 320ebee8541SInderpal Singh 32183014579SKukjin Kim return; 32283014579SKukjin Kim } 32383014579SKukjin Kim 324c9347101SJongpill Lee static struct syscore_ops exynos_pm_syscore_ops = { 325c9347101SJongpill Lee .suspend = exynos_pm_suspend, 326c9347101SJongpill Lee .resume = exynos_pm_resume, 32783014579SKukjin Kim }; 32883014579SKukjin Kim 329d710aa31STomasz Figa /* 330d710aa31STomasz Figa * Suspend Ops 331d710aa31STomasz Figa */ 332d710aa31STomasz Figa 333d710aa31STomasz Figa static int exynos_suspend_enter(suspend_state_t state) 334d710aa31STomasz Figa { 335d710aa31STomasz Figa int ret; 336d710aa31STomasz Figa 337d710aa31STomasz Figa s3c_pm_debug_init(); 338d710aa31STomasz Figa 339d710aa31STomasz Figa S3C_PMDBG("%s: suspending the system...\n", __func__); 340d710aa31STomasz Figa 341d710aa31STomasz Figa S3C_PMDBG("%s: wakeup masks: %08x,%08x\n", __func__, 342d710aa31STomasz Figa exynos_irqwake_intmask, exynos_get_eint_wake_mask()); 343d710aa31STomasz Figa 344d710aa31STomasz Figa if (exynos_irqwake_intmask == -1U 345d710aa31STomasz Figa && exynos_get_eint_wake_mask() == -1U) { 346d710aa31STomasz Figa pr_err("%s: No wake-up sources!\n", __func__); 347d710aa31STomasz Figa pr_err("%s: Aborting sleep\n", __func__); 348d710aa31STomasz Figa return -EINVAL; 349d710aa31STomasz Figa } 350d710aa31STomasz Figa 351d710aa31STomasz Figa s3c_pm_save_uarts(); 352d710aa31STomasz Figa exynos_pm_prepare(); 353d710aa31STomasz Figa flush_cache_all(); 354d710aa31STomasz Figa s3c_pm_check_store(); 355d710aa31STomasz Figa 356d710aa31STomasz Figa ret = cpu_suspend(0, exynos_cpu_suspend); 357d710aa31STomasz Figa if (ret) 358d710aa31STomasz Figa return ret; 359d710aa31STomasz Figa 360d710aa31STomasz Figa s3c_pm_restore_uarts(); 361d710aa31STomasz Figa 362d710aa31STomasz Figa S3C_PMDBG("%s: wakeup stat: %08x\n", __func__, 363d710aa31STomasz Figa __raw_readl(S5P_WAKEUP_STAT)); 364d710aa31STomasz Figa 365d710aa31STomasz Figa s3c_pm_check_restore(); 366d710aa31STomasz Figa 367d710aa31STomasz Figa S3C_PMDBG("%s: resuming the system...\n", __func__); 368d710aa31STomasz Figa 369d710aa31STomasz Figa return 0; 370d710aa31STomasz Figa } 371d710aa31STomasz Figa 372d710aa31STomasz Figa static int exynos_suspend_prepare(void) 373d710aa31STomasz Figa { 374d710aa31STomasz Figa s3c_pm_check_prepare(); 375d710aa31STomasz Figa 376d710aa31STomasz Figa return 0; 377d710aa31STomasz Figa } 378d710aa31STomasz Figa 379d710aa31STomasz Figa static void exynos_suspend_finish(void) 380d710aa31STomasz Figa { 381d710aa31STomasz Figa s3c_pm_check_cleanup(); 382d710aa31STomasz Figa } 383d710aa31STomasz Figa 384d710aa31STomasz Figa static const struct platform_suspend_ops exynos_suspend_ops = { 385d710aa31STomasz Figa .enter = exynos_suspend_enter, 386d710aa31STomasz Figa .prepare = exynos_suspend_prepare, 387d710aa31STomasz Figa .finish = exynos_suspend_finish, 388d710aa31STomasz Figa .valid = suspend_valid_only_mem, 389d710aa31STomasz Figa }; 390d710aa31STomasz Figa 39185f9f908SDaniel Lezcano static int exynos_cpu_pm_notifier(struct notifier_block *self, 39285f9f908SDaniel Lezcano unsigned long cmd, void *v) 39385f9f908SDaniel Lezcano { 39485f9f908SDaniel Lezcano int cpu = smp_processor_id(); 39585f9f908SDaniel Lezcano 39685f9f908SDaniel Lezcano switch (cmd) { 39785f9f908SDaniel Lezcano case CPU_PM_ENTER: 39885f9f908SDaniel Lezcano if (cpu == 0) 39985f9f908SDaniel Lezcano exynos_cpu_save_register(); 40085f9f908SDaniel Lezcano break; 40185f9f908SDaniel Lezcano 40285f9f908SDaniel Lezcano case CPU_PM_EXIT: 403795537daSDaniel Lezcano if (cpu == 0) { 404795537daSDaniel Lezcano #ifdef CONFIG_SMP 405795537daSDaniel Lezcano if (!soc_is_exynos5250()) 406795537daSDaniel Lezcano scu_enable(S5P_VA_SCU); 407795537daSDaniel Lezcano #endif 40885f9f908SDaniel Lezcano exynos_cpu_restore_register(); 409795537daSDaniel Lezcano } 41085f9f908SDaniel Lezcano break; 41185f9f908SDaniel Lezcano } 41285f9f908SDaniel Lezcano 41385f9f908SDaniel Lezcano return NOTIFY_OK; 41485f9f908SDaniel Lezcano } 41585f9f908SDaniel Lezcano 41685f9f908SDaniel Lezcano static struct notifier_block exynos_cpu_pm_notifier_block = { 41785f9f908SDaniel Lezcano .notifier_call = exynos_cpu_pm_notifier, 41885f9f908SDaniel Lezcano }; 41985f9f908SDaniel Lezcano 420559ba237STomasz Figa void __init exynos_pm_init(void) 42183014579SKukjin Kim { 422559ba237STomasz Figa u32 tmp; 423559ba237STomasz Figa 42485f9f908SDaniel Lezcano cpu_pm_register_notifier(&exynos_cpu_pm_notifier_block); 42585f9f908SDaniel Lezcano 426dd8ac696STomasz Figa /* Platform-specific GIC callback */ 427dd8ac696STomasz Figa gic_arch_extn.irq_set_wake = exynos_irq_set_wake; 428dd8ac696STomasz Figa 429559ba237STomasz Figa /* All wakeup disable */ 430559ba237STomasz Figa tmp = __raw_readl(S5P_WAKEUP_MASK); 431559ba237STomasz Figa tmp |= ((0xFF << 8) | (0x1F << 1)); 432559ba237STomasz Figa __raw_writel(tmp, S5P_WAKEUP_MASK); 433e085cad6SKukjin Kim 434c9347101SJongpill Lee register_syscore_ops(&exynos_pm_syscore_ops); 435d710aa31STomasz Figa suspend_set_ops(&exynos_suspend_ops); 43683014579SKukjin Kim } 437