1c9347101SJongpill Lee /* 2c9347101SJongpill Lee * Copyright (c) 2011-2012 Samsung Electronics Co., Ltd. 383014579SKukjin Kim * http://www.samsung.com 483014579SKukjin Kim * 5c9347101SJongpill Lee * EXYNOS - Power Management support 683014579SKukjin Kim * 783014579SKukjin Kim * Based on arch/arm/mach-s3c2410/pm.c 883014579SKukjin Kim * Copyright (c) 2006 Simtec Electronics 983014579SKukjin Kim * Ben Dooks <ben@simtec.co.uk> 1083014579SKukjin Kim * 1183014579SKukjin Kim * This program is free software; you can redistribute it and/or modify 1283014579SKukjin Kim * it under the terms of the GNU General Public License version 2 as 1383014579SKukjin Kim * published by the Free Software Foundation. 1483014579SKukjin Kim */ 1583014579SKukjin Kim 1683014579SKukjin Kim #include <linux/init.h> 1783014579SKukjin Kim #include <linux/suspend.h> 1883014579SKukjin Kim #include <linux/syscore_ops.h> 1983014579SKukjin Kim #include <linux/io.h> 2083014579SKukjin Kim #include <linux/err.h> 2183014579SKukjin Kim #include <linux/clk.h> 2283014579SKukjin Kim 2383014579SKukjin Kim #include <asm/cacheflush.h> 2483014579SKukjin Kim #include <asm/hardware/cache-l2x0.h> 2563b870f1SShawn Guo #include <asm/smp_scu.h> 2683014579SKukjin Kim 2783014579SKukjin Kim #include <plat/cpu.h> 2883014579SKukjin Kim #include <plat/pm.h> 2983014579SKukjin Kim #include <plat/pll.h> 3083014579SKukjin Kim #include <plat/regs-srom.h> 3183014579SKukjin Kim 329c9239afSKukjin Kim #include <mach/map.h> 3383014579SKukjin Kim #include <mach/pm-core.h> 34ccd458c1SKukjin Kim 35ccd458c1SKukjin Kim #include "common.h" 3665c9a853SKukjin Kim #include "regs-pmu.h" 3783014579SKukjin Kim 3886ffb0e8SAbhilash Kesavan static struct sleep_save exynos5_sys_save[] = { 3986ffb0e8SAbhilash Kesavan SAVE_ITEM(EXYNOS5_SYS_I2C_CFG), 4086ffb0e8SAbhilash Kesavan }; 4186ffb0e8SAbhilash Kesavan 42c9347101SJongpill Lee static struct sleep_save exynos_core_save[] = { 4383014579SKukjin Kim /* SROM side */ 4483014579SKukjin Kim SAVE_ITEM(S5P_SROM_BW), 4583014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC0), 4683014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC1), 4783014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC2), 4883014579SKukjin Kim SAVE_ITEM(S5P_SROM_BC3), 4983014579SKukjin Kim }; 5083014579SKukjin Kim 5183014579SKukjin Kim 5283014579SKukjin Kim /* For Cortex-A9 Diagnostic and Power control register */ 5383014579SKukjin Kim static unsigned int save_arm_register[2]; 5483014579SKukjin Kim 55c9347101SJongpill Lee static int exynos_cpu_suspend(unsigned long arg) 5683014579SKukjin Kim { 5760e49ca6SJongpill Lee #ifdef CONFIG_CACHE_L2X0 5883014579SKukjin Kim outer_flush_all(); 5960e49ca6SJongpill Lee #endif 6083014579SKukjin Kim 61573e5bbeSAbhilash Kesavan if (soc_is_exynos5250()) 62573e5bbeSAbhilash Kesavan flush_cache_all(); 63573e5bbeSAbhilash Kesavan 6483014579SKukjin Kim /* issue the standby signal into the pm unit. */ 6583014579SKukjin Kim cpu_do_idle(); 6683014579SKukjin Kim 67d3fcacf5SAbhilash Kesavan pr_info("Failed to suspend the system\n"); 68d3fcacf5SAbhilash Kesavan return 1; /* Aborting suspend */ 6983014579SKukjin Kim } 7083014579SKukjin Kim 71c9347101SJongpill Lee static void exynos_pm_prepare(void) 7283014579SKukjin Kim { 7360e49ca6SJongpill Lee unsigned int tmp; 7483014579SKukjin Kim 75c9347101SJongpill Lee s3c_pm_do_save(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 7660e49ca6SJongpill Lee 77e11d919eSTomasz Figa if (soc_is_exynos5250()) { 7886ffb0e8SAbhilash Kesavan s3c_pm_do_save(exynos5_sys_save, ARRAY_SIZE(exynos5_sys_save)); 7960e49ca6SJongpill Lee /* Disable USE_RETENTION of JPEG_MEM_OPTION */ 8060e49ca6SJongpill Lee tmp = __raw_readl(EXYNOS5_JPEG_MEM_OPTION); 8160e49ca6SJongpill Lee tmp &= ~EXYNOS5_OPTION_USE_RETENTION; 8260e49ca6SJongpill Lee __raw_writel(tmp, EXYNOS5_JPEG_MEM_OPTION); 8360e49ca6SJongpill Lee } 8483014579SKukjin Kim 8583014579SKukjin Kim /* Set value of power down register for sleep mode */ 8683014579SKukjin Kim 877d44d2baSJongpill Lee exynos_sys_powerdown_conf(SYS_SLEEP); 8883014579SKukjin Kim __raw_writel(S5P_CHECK_SLEEP, S5P_INFORM1); 8983014579SKukjin Kim 9083014579SKukjin Kim /* ensure at least INFORM0 has the resume address */ 9183014579SKukjin Kim 9283014579SKukjin Kim __raw_writel(virt_to_phys(s3c_cpu_resume), S5P_INFORM0); 9383014579SKukjin Kim } 9483014579SKukjin Kim 95c9347101SJongpill Lee static int exynos_pm_suspend(void) 9683014579SKukjin Kim { 9783014579SKukjin Kim unsigned long tmp; 9883014579SKukjin Kim 9983014579SKukjin Kim /* Setting Central Sequence Register for power down mode */ 10083014579SKukjin Kim 10183014579SKukjin Kim tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); 10283014579SKukjin Kim tmp &= ~S5P_CENTRAL_LOWPWR_CFG; 10383014579SKukjin Kim __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); 10483014579SKukjin Kim 10560e49ca6SJongpill Lee /* Setting SEQ_OPTION register */ 10683014579SKukjin Kim 10760e49ca6SJongpill Lee tmp = (S5P_USE_STANDBY_WFI0 | S5P_USE_STANDBY_WFE0); 10860e49ca6SJongpill Lee __raw_writel(tmp, S5P_CENTRAL_SEQ_OPTION); 10960e49ca6SJongpill Lee 11060e49ca6SJongpill Lee if (!soc_is_exynos5250()) { 11183014579SKukjin Kim /* Save Power control register */ 11283014579SKukjin Kim asm ("mrc p15, 0, %0, c15, c0, 0" 11383014579SKukjin Kim : "=r" (tmp) : : "cc"); 11483014579SKukjin Kim save_arm_register[0] = tmp; 11583014579SKukjin Kim 11683014579SKukjin Kim /* Save Diagnostic register */ 11783014579SKukjin Kim asm ("mrc p15, 0, %0, c15, c0, 1" 11883014579SKukjin Kim : "=r" (tmp) : : "cc"); 11983014579SKukjin Kim save_arm_register[1] = tmp; 12060e49ca6SJongpill Lee } 12183014579SKukjin Kim 12283014579SKukjin Kim return 0; 12383014579SKukjin Kim } 12483014579SKukjin Kim 125c9347101SJongpill Lee static void exynos_pm_resume(void) 12683014579SKukjin Kim { 12783014579SKukjin Kim unsigned long tmp; 12883014579SKukjin Kim 12983014579SKukjin Kim /* 13083014579SKukjin Kim * If PMU failed while entering sleep mode, WFI will be 13183014579SKukjin Kim * ignored by PMU and then exiting cpu_do_idle(). 13283014579SKukjin Kim * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically 13383014579SKukjin Kim * in this situation. 13483014579SKukjin Kim */ 13583014579SKukjin Kim tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION); 13683014579SKukjin Kim if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) { 13783014579SKukjin Kim tmp |= S5P_CENTRAL_LOWPWR_CFG; 13883014579SKukjin Kim __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION); 139d3fcacf5SAbhilash Kesavan /* clear the wakeup state register */ 140d3fcacf5SAbhilash Kesavan __raw_writel(0x0, S5P_WAKEUP_STAT); 14183014579SKukjin Kim /* No need to perform below restore code */ 14283014579SKukjin Kim goto early_wakeup; 14383014579SKukjin Kim } 14460e49ca6SJongpill Lee if (!soc_is_exynos5250()) { 14583014579SKukjin Kim /* Restore Power control register */ 14683014579SKukjin Kim tmp = save_arm_register[0]; 14783014579SKukjin Kim asm volatile ("mcr p15, 0, %0, c15, c0, 0" 14883014579SKukjin Kim : : "r" (tmp) 14983014579SKukjin Kim : "cc"); 15083014579SKukjin Kim 15183014579SKukjin Kim /* Restore Diagnostic register */ 15283014579SKukjin Kim tmp = save_arm_register[1]; 15383014579SKukjin Kim asm volatile ("mcr p15, 0, %0, c15, c0, 1" 15483014579SKukjin Kim : : "r" (tmp) 15583014579SKukjin Kim : "cc"); 15660e49ca6SJongpill Lee } 15783014579SKukjin Kim 15883014579SKukjin Kim /* For release retention */ 15983014579SKukjin Kim 16083014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MAUDIO_OPTION); 16183014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_GPIO_OPTION); 16283014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_UART_OPTION); 16383014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MMCA_OPTION); 16483014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_MMCB_OPTION); 16583014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_EBIA_OPTION); 16683014579SKukjin Kim __raw_writel((1 << 28), S5P_PAD_RET_EBIB_OPTION); 16783014579SKukjin Kim 16886ffb0e8SAbhilash Kesavan if (soc_is_exynos5250()) 16986ffb0e8SAbhilash Kesavan s3c_pm_do_restore(exynos5_sys_save, 17086ffb0e8SAbhilash Kesavan ARRAY_SIZE(exynos5_sys_save)); 17186ffb0e8SAbhilash Kesavan 172c9347101SJongpill Lee s3c_pm_do_restore_core(exynos_core_save, ARRAY_SIZE(exynos_core_save)); 17383014579SKukjin Kim 174e11d919eSTomasz Figa if (IS_ENABLED(CONFIG_SMP) && !soc_is_exynos5250()) 17563b870f1SShawn Guo scu_enable(S5P_VA_SCU); 17683014579SKukjin Kim 17783014579SKukjin Kim early_wakeup: 178ebee8541SInderpal Singh 179ebee8541SInderpal Singh /* Clear SLEEP mode set in INFORM1 */ 180ebee8541SInderpal Singh __raw_writel(0x0, S5P_INFORM1); 181ebee8541SInderpal Singh 18283014579SKukjin Kim return; 18383014579SKukjin Kim } 18483014579SKukjin Kim 185c9347101SJongpill Lee static struct syscore_ops exynos_pm_syscore_ops = { 186c9347101SJongpill Lee .suspend = exynos_pm_suspend, 187c9347101SJongpill Lee .resume = exynos_pm_resume, 18883014579SKukjin Kim }; 18983014579SKukjin Kim 190559ba237STomasz Figa void __init exynos_pm_init(void) 19183014579SKukjin Kim { 192559ba237STomasz Figa u32 tmp; 193559ba237STomasz Figa 194559ba237STomasz Figa pm_cpu_prep = exynos_pm_prepare; 195559ba237STomasz Figa pm_cpu_sleep = exynos_cpu_suspend; 196559ba237STomasz Figa 197559ba237STomasz Figa s3c_pm_init(); 198559ba237STomasz Figa 199559ba237STomasz Figa /* All wakeup disable */ 200559ba237STomasz Figa tmp = __raw_readl(S5P_WAKEUP_MASK); 201559ba237STomasz Figa tmp |= ((0xFF << 8) | (0x1F << 1)); 202559ba237STomasz Figa __raw_writel(tmp, S5P_WAKEUP_MASK); 203e085cad6SKukjin Kim 204c9347101SJongpill Lee register_syscore_ops(&exynos_pm_syscore_ops); 20583014579SKukjin Kim } 206