1 /* 2 * Copyright (C) 2012 Samsung Electronics. 3 * Kyungmin Park <kyungmin.park@samsung.com> 4 * Tomasz Figa <t.figa@samsung.com> 5 * 6 * This program is free software,you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 11 #include <linux/kernel.h> 12 #include <linux/io.h> 13 #include <linux/init.h> 14 #include <linux/of.h> 15 #include <linux/of_address.h> 16 17 #include <asm/cacheflush.h> 18 #include <asm/cputype.h> 19 #include <asm/firmware.h> 20 #include <asm/suspend.h> 21 22 #include <mach/map.h> 23 24 #include "common.h" 25 #include "smc.h" 26 27 #define EXYNOS_SLEEP_MAGIC 0x00000bad 28 #define EXYNOS_AFTR_MAGIC 0xfcba0d10 29 #define EXYNOS_BOOT_ADDR 0x8 30 #define EXYNOS_BOOT_FLAG 0xc 31 32 static void exynos_save_cp15(void) 33 { 34 /* Save Power control and Diagnostic registers */ 35 asm ("mrc p15, 0, %0, c15, c0, 0\n" 36 "mrc p15, 0, %1, c15, c0, 1\n" 37 : "=r" (cp15_save_power), "=r" (cp15_save_diag) 38 : : "cc"); 39 } 40 41 static int exynos_do_idle(unsigned long mode) 42 { 43 switch (mode) { 44 case FW_DO_IDLE_AFTR: 45 if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 46 exynos_save_cp15(); 47 __raw_writel(virt_to_phys(exynos_cpu_resume_ns), 48 sysram_ns_base_addr + 0x24); 49 __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); 50 exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); 51 break; 52 case FW_DO_IDLE_SLEEP: 53 exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); 54 } 55 return 0; 56 } 57 58 static int exynos_cpu_boot(int cpu) 59 { 60 /* 61 * Exynos3250 doesn't need to send smc command for secondary CPU boot 62 * because Exynos3250 removes WFE in secure mode. 63 */ 64 if (soc_is_exynos3250()) 65 return 0; 66 67 /* 68 * The second parameter of SMC_CMD_CPU1BOOT command means CPU id. 69 * But, Exynos4212 has only one secondary CPU so second parameter 70 * isn't used for informing secure firmware about CPU id. 71 */ 72 if (soc_is_exynos4212()) 73 cpu = 0; 74 75 exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); 76 return 0; 77 } 78 79 static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) 80 { 81 void __iomem *boot_reg; 82 83 if (!sysram_ns_base_addr) 84 return -ENODEV; 85 86 boot_reg = sysram_ns_base_addr + 0x1c; 87 88 /* 89 * Almost all Exynos-series of SoCs that run in secure mode don't need 90 * additional offset for every CPU, with Exynos4412 being the only 91 * exception. 92 */ 93 if (soc_is_exynos4412()) 94 boot_reg += 4 * cpu; 95 96 __raw_writel(boot_addr, boot_reg); 97 return 0; 98 } 99 100 static int exynos_cpu_suspend(unsigned long arg) 101 { 102 flush_cache_all(); 103 outer_flush_all(); 104 105 exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); 106 107 pr_info("Failed to suspend the system\n"); 108 writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG); 109 return 1; 110 } 111 112 static int exynos_suspend(void) 113 { 114 if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 115 exynos_save_cp15(); 116 117 writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG); 118 writel(virt_to_phys(exynos_cpu_resume_ns), 119 sysram_ns_base_addr + EXYNOS_BOOT_ADDR); 120 121 return cpu_suspend(0, exynos_cpu_suspend); 122 } 123 124 static int exynos_resume(void) 125 { 126 writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG); 127 128 return 0; 129 } 130 131 static const struct firmware_ops exynos_firmware_ops = { 132 .do_idle = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL, 133 .set_cpu_boot_addr = exynos_set_cpu_boot_addr, 134 .cpu_boot = exynos_cpu_boot, 135 .suspend = IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL, 136 .resume = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL, 137 }; 138 139 void __init exynos_firmware_init(void) 140 { 141 struct device_node *nd; 142 const __be32 *addr; 143 144 nd = of_find_compatible_node(NULL, NULL, 145 "samsung,secure-firmware"); 146 if (!nd) 147 return; 148 149 addr = of_get_address(nd, 0, NULL, NULL); 150 if (!addr) { 151 pr_err("%s: No address specified.\n", __func__); 152 return; 153 } 154 155 pr_info("Running under secure firmware.\n"); 156 157 register_firmware_ops(&exynos_firmware_ops); 158 } 159