1bca28f8fSTomasz Figa /* 2bca28f8fSTomasz Figa * Copyright (C) 2012 Samsung Electronics. 3bca28f8fSTomasz Figa * Kyungmin Park <kyungmin.park@samsung.com> 4bca28f8fSTomasz Figa * Tomasz Figa <t.figa@samsung.com> 5bca28f8fSTomasz Figa * 6bca28f8fSTomasz Figa * This program is free software,you can redistribute it and/or modify 7bca28f8fSTomasz Figa * it under the terms of the GNU General Public License version 2 as 8bca28f8fSTomasz Figa * published by the Free Software Foundation. 9bca28f8fSTomasz Figa */ 10bca28f8fSTomasz Figa 11bca28f8fSTomasz Figa #include <linux/kernel.h> 12bca28f8fSTomasz Figa #include <linux/io.h> 13bca28f8fSTomasz Figa #include <linux/init.h> 14bca28f8fSTomasz Figa #include <linux/of.h> 15bca28f8fSTomasz Figa #include <linux/of_address.h> 16bca28f8fSTomasz Figa 172b9d9c32STomasz Figa #include <asm/cacheflush.h> 182b9d9c32STomasz Figa #include <asm/cputype.h> 19bca28f8fSTomasz Figa #include <asm/firmware.h> 202b9d9c32STomasz Figa #include <asm/suspend.h> 21bca28f8fSTomasz Figa 22bca28f8fSTomasz Figa #include <mach/map.h> 23bca28f8fSTomasz Figa 24b3205deaSSachin Kamat #include "common.h" 25bca28f8fSTomasz Figa #include "smc.h" 26bca28f8fSTomasz Figa 272b9d9c32STomasz Figa #define EXYNOS_SLEEP_MAGIC 0x00000bad 28a135e201SBartlomiej Zolnierkiewicz #define EXYNOS_AFTR_MAGIC 0xfcba0d10 292b9d9c32STomasz Figa #define EXYNOS_BOOT_ADDR 0x8 302b9d9c32STomasz Figa #define EXYNOS_BOOT_FLAG 0xc 312b9d9c32STomasz Figa 32a135e201SBartlomiej Zolnierkiewicz static void exynos_save_cp15(void) 33a135e201SBartlomiej Zolnierkiewicz { 34a135e201SBartlomiej Zolnierkiewicz /* Save Power control and Diagnostic registers */ 35a135e201SBartlomiej Zolnierkiewicz asm ("mrc p15, 0, %0, c15, c0, 0\n" 36a135e201SBartlomiej Zolnierkiewicz "mrc p15, 0, %1, c15, c0, 1\n" 37a135e201SBartlomiej Zolnierkiewicz : "=r" (cp15_save_power), "=r" (cp15_save_diag) 38a135e201SBartlomiej Zolnierkiewicz : : "cc"); 39a135e201SBartlomiej Zolnierkiewicz } 40a135e201SBartlomiej Zolnierkiewicz 410b7778a8SBartlomiej Zolnierkiewicz static int exynos_do_idle(unsigned long mode) 42bca28f8fSTomasz Figa { 430b7778a8SBartlomiej Zolnierkiewicz switch (mode) { 440b7778a8SBartlomiej Zolnierkiewicz case FW_DO_IDLE_AFTR: 45a135e201SBartlomiej Zolnierkiewicz if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 46a135e201SBartlomiej Zolnierkiewicz exynos_save_cp15(); 47a135e201SBartlomiej Zolnierkiewicz __raw_writel(virt_to_phys(exynos_cpu_resume_ns), 48a135e201SBartlomiej Zolnierkiewicz sysram_ns_base_addr + 0x24); 49a135e201SBartlomiej Zolnierkiewicz __raw_writel(EXYNOS_AFTR_MAGIC, sysram_ns_base_addr + 0x20); 500b7778a8SBartlomiej Zolnierkiewicz exynos_smc(SMC_CMD_CPU0AFTR, 0, 0, 0); 510b7778a8SBartlomiej Zolnierkiewicz break; 520b7778a8SBartlomiej Zolnierkiewicz case FW_DO_IDLE_SLEEP: 53bca28f8fSTomasz Figa exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); 540b7778a8SBartlomiej Zolnierkiewicz } 55bca28f8fSTomasz Figa return 0; 56bca28f8fSTomasz Figa } 57bca28f8fSTomasz Figa 58bca28f8fSTomasz Figa static int exynos_cpu_boot(int cpu) 59bca28f8fSTomasz Figa { 60989ff3fdSKyungmin Park /* 616457158aSChanwoo Choi * Exynos3250 doesn't need to send smc command for secondary CPU boot 626457158aSChanwoo Choi * because Exynos3250 removes WFE in secure mode. 636457158aSChanwoo Choi */ 646457158aSChanwoo Choi if (soc_is_exynos3250()) 656457158aSChanwoo Choi return 0; 666457158aSChanwoo Choi 676457158aSChanwoo Choi /* 68989ff3fdSKyungmin Park * The second parameter of SMC_CMD_CPU1BOOT command means CPU id. 69989ff3fdSKyungmin Park * But, Exynos4212 has only one secondary CPU so second parameter 70989ff3fdSKyungmin Park * isn't used for informing secure firmware about CPU id. 71989ff3fdSKyungmin Park */ 72989ff3fdSKyungmin Park if (soc_is_exynos4212()) 73989ff3fdSKyungmin Park cpu = 0; 74989ff3fdSKyungmin Park 75bca28f8fSTomasz Figa exynos_smc(SMC_CMD_CPU1BOOT, cpu, 0, 0); 76bca28f8fSTomasz Figa return 0; 77bca28f8fSTomasz Figa } 78bca28f8fSTomasz Figa 79bca28f8fSTomasz Figa static int exynos_set_cpu_boot_addr(int cpu, unsigned long boot_addr) 80bca28f8fSTomasz Figa { 81b3205deaSSachin Kamat void __iomem *boot_reg; 82b3205deaSSachin Kamat 83b3205deaSSachin Kamat if (!sysram_ns_base_addr) 84b3205deaSSachin Kamat return -ENODEV; 85b3205deaSSachin Kamat 86fe388facSOlof Johansson boot_reg = sysram_ns_base_addr + 0x1c; 87989ff3fdSKyungmin Park 8835e75645SSachin Kamat /* 8935e75645SSachin Kamat * Almost all Exynos-series of SoCs that run in secure mode don't need 9035e75645SSachin Kamat * additional offset for every CPU, with Exynos4412 being the only 9135e75645SSachin Kamat * exception. 9235e75645SSachin Kamat */ 9335e75645SSachin Kamat if (soc_is_exynos4412()) 94989ff3fdSKyungmin Park boot_reg += 4 * cpu; 95bca28f8fSTomasz Figa 96bca28f8fSTomasz Figa __raw_writel(boot_addr, boot_reg); 97bca28f8fSTomasz Figa return 0; 98bca28f8fSTomasz Figa } 99bca28f8fSTomasz Figa 1002b9d9c32STomasz Figa static int exynos_cpu_suspend(unsigned long arg) 1012b9d9c32STomasz Figa { 1022b9d9c32STomasz Figa flush_cache_all(); 1032b9d9c32STomasz Figa outer_flush_all(); 1042b9d9c32STomasz Figa 1052b9d9c32STomasz Figa exynos_smc(SMC_CMD_SLEEP, 0, 0, 0); 1062b9d9c32STomasz Figa 1072b9d9c32STomasz Figa pr_info("Failed to suspend the system\n"); 1082b9d9c32STomasz Figa writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG); 1092b9d9c32STomasz Figa return 1; 1102b9d9c32STomasz Figa } 1112b9d9c32STomasz Figa 1122b9d9c32STomasz Figa static int exynos_suspend(void) 1132b9d9c32STomasz Figa { 114a135e201SBartlomiej Zolnierkiewicz if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) 115a135e201SBartlomiej Zolnierkiewicz exynos_save_cp15(); 1162b9d9c32STomasz Figa 1172b9d9c32STomasz Figa writel(EXYNOS_SLEEP_MAGIC, sysram_ns_base_addr + EXYNOS_BOOT_FLAG); 1182b9d9c32STomasz Figa writel(virt_to_phys(exynos_cpu_resume_ns), 1192b9d9c32STomasz Figa sysram_ns_base_addr + EXYNOS_BOOT_ADDR); 1202b9d9c32STomasz Figa 1212b9d9c32STomasz Figa return cpu_suspend(0, exynos_cpu_suspend); 1222b9d9c32STomasz Figa } 1232b9d9c32STomasz Figa 1242b9d9c32STomasz Figa static int exynos_resume(void) 1252b9d9c32STomasz Figa { 1262b9d9c32STomasz Figa writel(0, sysram_ns_base_addr + EXYNOS_BOOT_FLAG); 1272b9d9c32STomasz Figa 1282b9d9c32STomasz Figa return 0; 1292b9d9c32STomasz Figa } 1302b9d9c32STomasz Figa 131bca28f8fSTomasz Figa static const struct firmware_ops exynos_firmware_ops = { 13203c1b760SArnd Bergmann .do_idle = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_do_idle : NULL, 133bca28f8fSTomasz Figa .set_cpu_boot_addr = exynos_set_cpu_boot_addr, 134bca28f8fSTomasz Figa .cpu_boot = exynos_cpu_boot, 13503c1b760SArnd Bergmann .suspend = IS_ENABLED(CONFIG_PM_SLEEP) ? exynos_suspend : NULL, 13603c1b760SArnd Bergmann .resume = IS_ENABLED(CONFIG_EXYNOS_CPU_SUSPEND) ? exynos_resume : NULL, 137bca28f8fSTomasz Figa }; 138bca28f8fSTomasz Figa 139bca28f8fSTomasz Figa void __init exynos_firmware_init(void) 140bca28f8fSTomasz Figa { 141bca28f8fSTomasz Figa struct device_node *nd; 142bca28f8fSTomasz Figa const __be32 *addr; 143bca28f8fSTomasz Figa 144bca28f8fSTomasz Figa nd = of_find_compatible_node(NULL, NULL, 145bca28f8fSTomasz Figa "samsung,secure-firmware"); 146bca28f8fSTomasz Figa if (!nd) 147bca28f8fSTomasz Figa return; 148bca28f8fSTomasz Figa 149bca28f8fSTomasz Figa addr = of_get_address(nd, 0, NULL, NULL); 150bca28f8fSTomasz Figa if (!addr) { 151bca28f8fSTomasz Figa pr_err("%s: No address specified.\n", __func__); 152bca28f8fSTomasz Figa return; 153bca28f8fSTomasz Figa } 154bca28f8fSTomasz Figa 155bca28f8fSTomasz Figa pr_info("Running under secure firmware.\n"); 156bca28f8fSTomasz Figa 157bca28f8fSTomasz Figa register_firmware_ops(&exynos_firmware_ops); 158bca28f8fSTomasz Figa } 159