1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // SAMSUNG EXYNOS Flattened Device Tree enabled machine 4 // 5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. 6 // http://www.samsung.com 7 8 #include <linux/init.h> 9 #include <linux/io.h> 10 #include <linux/of.h> 11 #include <linux/of_address.h> 12 #include <linux/of_fdt.h> 13 #include <linux/platform_device.h> 14 #include <linux/irqchip.h> 15 #include <linux/soc/samsung/exynos-regs-pmu.h> 16 17 #include <asm/cacheflush.h> 18 #include <asm/hardware/cache-l2x0.h> 19 #include <asm/mach/arch.h> 20 #include <asm/mach/map.h> 21 22 #include <mach/map.h> 23 #include <plat/cpu.h> 24 25 #include "common.h" 26 27 static struct map_desc exynos4_iodesc[] __initdata = { 28 { 29 .virtual = (unsigned long)S5P_VA_COREPERI_BASE, 30 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), 31 .length = SZ_8K, 32 .type = MT_DEVICE, 33 }, 34 }; 35 36 static struct platform_device exynos_cpuidle = { 37 .name = "exynos_cpuidle", 38 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE 39 .dev.platform_data = exynos_enter_aftr, 40 #endif 41 .id = -1, 42 }; 43 44 void __iomem *sysram_base_addr __ro_after_init; 45 void __iomem *sysram_ns_base_addr __ro_after_init; 46 47 void __init exynos_sysram_init(void) 48 { 49 struct device_node *node; 50 51 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { 52 if (!of_device_is_available(node)) 53 continue; 54 sysram_base_addr = of_iomap(node, 0); 55 break; 56 } 57 58 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { 59 if (!of_device_is_available(node)) 60 continue; 61 sysram_ns_base_addr = of_iomap(node, 0); 62 break; 63 } 64 } 65 66 static void __init exynos_init_late(void) 67 { 68 if (of_machine_is_compatible("samsung,exynos5440")) 69 /* to be supported later */ 70 return; 71 72 exynos_pm_init(); 73 } 74 75 static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, 76 int depth, void *data) 77 { 78 struct map_desc iodesc; 79 const __be32 *reg; 80 int len; 81 82 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && 83 !of_flat_dt_is_compatible(node, "samsung,exynos5440-clock")) 84 return 0; 85 86 reg = of_get_flat_dt_prop(node, "reg", &len); 87 if (reg == NULL || len != (sizeof(unsigned long) * 2)) 88 return 0; 89 90 iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); 91 iodesc.length = be32_to_cpu(reg[1]) - 1; 92 iodesc.virtual = (unsigned long)S5P_VA_CHIPID; 93 iodesc.type = MT_DEVICE; 94 iotable_init(&iodesc, 1); 95 return 1; 96 } 97 98 /* 99 * exynos_map_io 100 * 101 * register the standard cpu IO areas 102 */ 103 static void __init exynos_map_io(void) 104 { 105 if (soc_is_exynos4()) 106 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); 107 } 108 109 static void __init exynos_init_io(void) 110 { 111 debug_ll_io_init(); 112 113 of_scan_flat_dt(exynos_fdt_map_chipid, NULL); 114 115 /* detect cpu id and rev. */ 116 s5p_init_cpu(S5P_VA_CHIPID); 117 118 exynos_map_io(); 119 } 120 121 /* 122 * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code 123 * and suspend. 124 * 125 * This is necessary only on Exynos4 SoCs. When system is running 126 * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down 127 * feature could properly detect global idle state when secondary CPU is 128 * powered down. 129 * 130 * However this should not be set when such system is going into suspend. 131 */ 132 void exynos_set_delayed_reset_assertion(bool enable) 133 { 134 if (of_machine_is_compatible("samsung,exynos4")) { 135 unsigned int tmp, core_id; 136 137 for (core_id = 0; core_id < num_possible_cpus(); core_id++) { 138 tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id)); 139 if (enable) 140 tmp |= S5P_USE_DELAYED_RESET_ASSERTION; 141 else 142 tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION); 143 pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id)); 144 } 145 } 146 } 147 148 /* 149 * Apparently, these SoCs are not able to wake-up from suspend using 150 * the PMU. Too bad. Should they suddenly become capable of such a 151 * feat, the matches below should be moved to suspend.c. 152 */ 153 static const struct of_device_id exynos_dt_pmu_match[] = { 154 { .compatible = "samsung,exynos5260-pmu" }, 155 { .compatible = "samsung,exynos5410-pmu" }, 156 { /*sentinel*/ }, 157 }; 158 159 static void exynos_map_pmu(void) 160 { 161 struct device_node *np; 162 163 np = of_find_matching_node(NULL, exynos_dt_pmu_match); 164 if (np) 165 pmu_base_addr = of_iomap(np, 0); 166 } 167 168 static void __init exynos_init_irq(void) 169 { 170 irqchip_init(); 171 /* 172 * Since platsmp.c needs pmu base address by the time 173 * DT is not unflatten so we can't use DT APIs before 174 * init_irq 175 */ 176 exynos_map_pmu(); 177 } 178 179 static void __init exynos_dt_machine_init(void) 180 { 181 /* 182 * This is called from smp_prepare_cpus if we've built for SMP, but 183 * we still need to set it up for PM and firmware ops if not. 184 */ 185 if (!IS_ENABLED(CONFIG_SMP)) 186 exynos_sysram_init(); 187 188 #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE) 189 if (of_machine_is_compatible("samsung,exynos4210") || 190 of_machine_is_compatible("samsung,exynos3250")) 191 exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data; 192 #endif 193 if (of_machine_is_compatible("samsung,exynos4210") || 194 (of_machine_is_compatible("samsung,exynos4412") && 195 of_machine_is_compatible("samsung,trats2")) || 196 of_machine_is_compatible("samsung,exynos3250") || 197 of_machine_is_compatible("samsung,exynos5250")) 198 platform_device_register(&exynos_cpuidle); 199 } 200 201 static char const *const exynos_dt_compat[] __initconst = { 202 "samsung,exynos3", 203 "samsung,exynos3250", 204 "samsung,exynos4", 205 "samsung,exynos4210", 206 "samsung,exynos4412", 207 "samsung,exynos5", 208 "samsung,exynos5250", 209 "samsung,exynos5260", 210 "samsung,exynos5420", 211 "samsung,exynos5440", 212 NULL 213 }; 214 215 static void __init exynos_dt_fixup(void) 216 { 217 /* 218 * Some versions of uboot pass garbage entries in the memory node, 219 * use the old CONFIG_ARM_NR_BANKS 220 */ 221 of_fdt_limit_memory(8); 222 } 223 224 DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") 225 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ 226 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 227 .l2c_aux_val = 0x3c400001, 228 .l2c_aux_mask = 0xc20fffff, 229 .smp = smp_ops(exynos_smp_ops), 230 .map_io = exynos_init_io, 231 .init_early = exynos_firmware_init, 232 .init_irq = exynos_init_irq, 233 .init_machine = exynos_dt_machine_init, 234 .init_late = exynos_init_late, 235 .dt_compat = exynos_dt_compat, 236 .dt_fixup = exynos_dt_fixup, 237 MACHINE_END 238