1 /* 2 * SAMSUNG EXYNOS Flattened Device Tree enabled machine 3 * 4 * Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. 5 * http://www.samsung.com 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/init.h> 13 #include <linux/io.h> 14 #include <linux/of.h> 15 #include <linux/of_address.h> 16 #include <linux/of_fdt.h> 17 #include <linux/of_platform.h> 18 #include <linux/platform_device.h> 19 #include <linux/irqchip.h> 20 #include <linux/soc/samsung/exynos-regs-pmu.h> 21 22 #include <asm/cacheflush.h> 23 #include <asm/hardware/cache-l2x0.h> 24 #include <asm/mach/arch.h> 25 #include <asm/mach/map.h> 26 27 #include <mach/map.h> 28 #include <plat/cpu.h> 29 30 #include "common.h" 31 #include "mfc.h" 32 33 static struct map_desc exynos4_iodesc[] __initdata = { 34 { 35 .virtual = (unsigned long)S5P_VA_CMU, 36 .pfn = __phys_to_pfn(EXYNOS4_PA_CMU), 37 .length = SZ_128K, 38 .type = MT_DEVICE, 39 }, { 40 .virtual = (unsigned long)S5P_VA_COREPERI_BASE, 41 .pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI), 42 .length = SZ_8K, 43 .type = MT_DEVICE, 44 }, { 45 .virtual = (unsigned long)S5P_VA_DMC0, 46 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC0), 47 .length = SZ_64K, 48 .type = MT_DEVICE, 49 }, { 50 .virtual = (unsigned long)S5P_VA_DMC1, 51 .pfn = __phys_to_pfn(EXYNOS4_PA_DMC1), 52 .length = SZ_64K, 53 .type = MT_DEVICE, 54 }, 55 }; 56 57 static struct platform_device exynos_cpuidle = { 58 .name = "exynos_cpuidle", 59 #ifdef CONFIG_ARM_EXYNOS_CPUIDLE 60 .dev.platform_data = exynos_enter_aftr, 61 #endif 62 .id = -1, 63 }; 64 65 void __iomem *sysram_base_addr; 66 void __iomem *sysram_ns_base_addr; 67 68 void __init exynos_sysram_init(void) 69 { 70 struct device_node *node; 71 72 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { 73 if (!of_device_is_available(node)) 74 continue; 75 sysram_base_addr = of_iomap(node, 0); 76 break; 77 } 78 79 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { 80 if (!of_device_is_available(node)) 81 continue; 82 sysram_ns_base_addr = of_iomap(node, 0); 83 break; 84 } 85 } 86 87 static void __init exynos_init_late(void) 88 { 89 if (of_machine_is_compatible("samsung,exynos5440")) 90 /* to be supported later */ 91 return; 92 93 exynos_pm_init(); 94 } 95 96 static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname, 97 int depth, void *data) 98 { 99 struct map_desc iodesc; 100 const __be32 *reg; 101 int len; 102 103 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") && 104 !of_flat_dt_is_compatible(node, "samsung,exynos5440-clock")) 105 return 0; 106 107 reg = of_get_flat_dt_prop(node, "reg", &len); 108 if (reg == NULL || len != (sizeof(unsigned long) * 2)) 109 return 0; 110 111 iodesc.pfn = __phys_to_pfn(be32_to_cpu(reg[0])); 112 iodesc.length = be32_to_cpu(reg[1]) - 1; 113 iodesc.virtual = (unsigned long)S5P_VA_CHIPID; 114 iodesc.type = MT_DEVICE; 115 iotable_init(&iodesc, 1); 116 return 1; 117 } 118 119 /* 120 * exynos_map_io 121 * 122 * register the standard cpu IO areas 123 */ 124 static void __init exynos_map_io(void) 125 { 126 if (soc_is_exynos4()) 127 iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc)); 128 } 129 130 static void __init exynos_init_io(void) 131 { 132 debug_ll_io_init(); 133 134 of_scan_flat_dt(exynos_fdt_map_chipid, NULL); 135 136 /* detect cpu id and rev. */ 137 s5p_init_cpu(S5P_VA_CHIPID); 138 139 exynos_map_io(); 140 } 141 142 /* 143 * Set or clear the USE_DELAYED_RESET_ASSERTION option. Used by smp code 144 * and suspend. 145 * 146 * This is necessary only on Exynos4 SoCs. When system is running 147 * USE_DELAYED_RESET_ASSERTION should be set so the ARM CLK clock down 148 * feature could properly detect global idle state when secondary CPU is 149 * powered down. 150 * 151 * However this should not be set when such system is going into suspend. 152 */ 153 void exynos_set_delayed_reset_assertion(bool enable) 154 { 155 if (of_machine_is_compatible("samsung,exynos4")) { 156 unsigned int tmp, core_id; 157 158 for (core_id = 0; core_id < num_possible_cpus(); core_id++) { 159 tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id)); 160 if (enable) 161 tmp |= S5P_USE_DELAYED_RESET_ASSERTION; 162 else 163 tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION); 164 pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id)); 165 } 166 } 167 } 168 169 /* 170 * Apparently, these SoCs are not able to wake-up from suspend using 171 * the PMU. Too bad. Should they suddenly become capable of such a 172 * feat, the matches below should be moved to suspend.c. 173 */ 174 static const struct of_device_id exynos_dt_pmu_match[] = { 175 { .compatible = "samsung,exynos5260-pmu" }, 176 { .compatible = "samsung,exynos5410-pmu" }, 177 { /*sentinel*/ }, 178 }; 179 180 static void exynos_map_pmu(void) 181 { 182 struct device_node *np; 183 184 np = of_find_matching_node(NULL, exynos_dt_pmu_match); 185 if (np) 186 pmu_base_addr = of_iomap(np, 0); 187 } 188 189 static void __init exynos_init_irq(void) 190 { 191 irqchip_init(); 192 /* 193 * Since platsmp.c needs pmu base address by the time 194 * DT is not unflatten so we can't use DT APIs before 195 * init_irq 196 */ 197 exynos_map_pmu(); 198 } 199 200 static void __init exynos_dt_machine_init(void) 201 { 202 /* 203 * This is called from smp_prepare_cpus if we've built for SMP, but 204 * we still need to set it up for PM and firmware ops if not. 205 */ 206 if (!IS_ENABLED(CONFIG_SMP)) 207 exynos_sysram_init(); 208 209 #if defined(CONFIG_SMP) && defined(CONFIG_ARM_EXYNOS_CPUIDLE) 210 if (of_machine_is_compatible("samsung,exynos4210") || 211 of_machine_is_compatible("samsung,exynos3250")) 212 exynos_cpuidle.dev.platform_data = &cpuidle_coupled_exynos_data; 213 #endif 214 if (of_machine_is_compatible("samsung,exynos4210") || 215 of_machine_is_compatible("samsung,exynos4212") || 216 (of_machine_is_compatible("samsung,exynos4412") && 217 of_machine_is_compatible("samsung,trats2")) || 218 of_machine_is_compatible("samsung,exynos3250") || 219 of_machine_is_compatible("samsung,exynos5250")) 220 platform_device_register(&exynos_cpuidle); 221 222 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 223 } 224 225 static char const *const exynos_dt_compat[] __initconst = { 226 "samsung,exynos3", 227 "samsung,exynos3250", 228 "samsung,exynos4", 229 "samsung,exynos4210", 230 "samsung,exynos4212", 231 "samsung,exynos4412", 232 "samsung,exynos4415", 233 "samsung,exynos5", 234 "samsung,exynos5250", 235 "samsung,exynos5260", 236 "samsung,exynos5420", 237 "samsung,exynos5440", 238 NULL 239 }; 240 241 static void __init exynos_reserve(void) 242 { 243 #ifdef CONFIG_S5P_DEV_MFC 244 int i; 245 char *mfc_mem[] = { 246 "samsung,mfc-v5", 247 "samsung,mfc-v6", 248 "samsung,mfc-v7", 249 "samsung,mfc-v8", 250 }; 251 252 for (i = 0; i < ARRAY_SIZE(mfc_mem); i++) 253 if (of_scan_flat_dt(s5p_fdt_alloc_mfc_mem, mfc_mem[i])) 254 break; 255 #endif 256 } 257 258 static void __init exynos_dt_fixup(void) 259 { 260 /* 261 * Some versions of uboot pass garbage entries in the memory node, 262 * use the old CONFIG_ARM_NR_BANKS 263 */ 264 of_fdt_limit_memory(8); 265 } 266 267 DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") 268 /* Maintainer: Thomas Abraham <thomas.abraham@linaro.org> */ 269 /* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */ 270 .l2c_aux_val = 0x3c400001, 271 .l2c_aux_mask = 0xc20fffff, 272 .smp = smp_ops(exynos_smp_ops), 273 .map_io = exynos_init_io, 274 .init_early = exynos_firmware_init, 275 .init_irq = exynos_init_irq, 276 .init_machine = exynos_dt_machine_init, 277 .init_late = exynos_init_late, 278 .dt_compat = exynos_dt_compat, 279 .reserve = exynos_reserve, 280 .dt_fixup = exynos_dt_fixup, 281 MACHINE_END 282