1 /* 2 * arch/arm/mach-ep93xx/core.c 3 * Core routines for Cirrus EP93xx chips. 4 * 5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> 6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> 7 * 8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key 9 * role in the ep93xx linux community. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 */ 16 17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt 18 19 #include <linux/kernel.h> 20 #include <linux/init.h> 21 #include <linux/platform_device.h> 22 #include <linux/interrupt.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/timex.h> 25 #include <linux/irq.h> 26 #include <linux/io.h> 27 #include <linux/gpio.h> 28 #include <linux/leds.h> 29 #include <linux/termios.h> 30 #include <linux/amba/bus.h> 31 #include <linux/amba/serial.h> 32 #include <linux/mtd/physmap.h> 33 #include <linux/i2c.h> 34 #include <linux/i2c-gpio.h> 35 #include <linux/spi/spi.h> 36 37 #include <mach/hardware.h> 38 #include <mach/fb.h> 39 #include <mach/ep93xx_keypad.h> 40 #include <mach/ep93xx_spi.h> 41 42 #include <asm/mach/map.h> 43 #include <asm/mach/time.h> 44 45 #include <asm/hardware/vic.h> 46 47 48 /************************************************************************* 49 * Static I/O mappings that are needed for all EP93xx platforms 50 *************************************************************************/ 51 static struct map_desc ep93xx_io_desc[] __initdata = { 52 { 53 .virtual = EP93XX_AHB_VIRT_BASE, 54 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), 55 .length = EP93XX_AHB_SIZE, 56 .type = MT_DEVICE, 57 }, { 58 .virtual = EP93XX_APB_VIRT_BASE, 59 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), 60 .length = EP93XX_APB_SIZE, 61 .type = MT_DEVICE, 62 }, 63 }; 64 65 void __init ep93xx_map_io(void) 66 { 67 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); 68 } 69 70 71 /************************************************************************* 72 * Timer handling for EP93xx 73 ************************************************************************* 74 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and 75 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate 76 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz, 77 * is free-running, and can't generate interrupts. 78 * 79 * The 508 kHz timers are ideal for use for the timer interrupt, as the 80 * most common values of HZ divide 508 kHz nicely. We pick one of the 16 81 * bit timers (timer 1) since we don't need more than 16 bits of reload 82 * value as long as HZ >= 8. 83 * 84 * The higher clock rate of timer 4 makes it a better choice than the 85 * other timers for use in gettimeoffset(), while the fact that it can't 86 * generate interrupts means we don't have to worry about not being able 87 * to use this timer for something else. We also use timer 4 for keeping 88 * track of lost jiffies. 89 */ 90 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x)) 91 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00) 92 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04) 93 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08) 94 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7) 95 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6) 96 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3) 97 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c) 98 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20) 99 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24) 100 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28) 101 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c) 102 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60) 103 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64) 104 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8) 105 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80) 106 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84) 107 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88) 108 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c) 109 110 #define EP93XX_TIMER123_CLOCK 508469 111 #define EP93XX_TIMER4_CLOCK 983040 112 113 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1) 114 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ) 115 116 static unsigned int last_jiffy_time; 117 118 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id) 119 { 120 /* Writing any value clears the timer interrupt */ 121 __raw_writel(1, EP93XX_TIMER1_CLEAR); 122 123 /* Recover lost jiffies */ 124 while ((signed long) 125 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) 126 >= TIMER4_TICKS_PER_JIFFY) { 127 last_jiffy_time += TIMER4_TICKS_PER_JIFFY; 128 timer_tick(); 129 } 130 131 return IRQ_HANDLED; 132 } 133 134 static struct irqaction ep93xx_timer_irq = { 135 .name = "ep93xx timer", 136 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 137 .handler = ep93xx_timer_interrupt, 138 }; 139 140 static void __init ep93xx_timer_init(void) 141 { 142 u32 tmode = EP93XX_TIMER123_CONTROL_MODE | 143 EP93XX_TIMER123_CONTROL_CLKSEL; 144 145 /* Enable periodic HZ timer. */ 146 __raw_writel(tmode, EP93XX_TIMER1_CONTROL); 147 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD); 148 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE, 149 EP93XX_TIMER1_CONTROL); 150 151 /* Enable lost jiffy timer. */ 152 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE, 153 EP93XX_TIMER4_VALUE_HIGH); 154 155 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq); 156 } 157 158 static unsigned long ep93xx_gettimeoffset(void) 159 { 160 int offset; 161 162 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time; 163 164 /* Calculate (1000000 / 983040) * offset. */ 165 return offset + (53 * offset / 3072); 166 } 167 168 struct sys_timer ep93xx_timer = { 169 .init = ep93xx_timer_init, 170 .offset = ep93xx_gettimeoffset, 171 }; 172 173 174 /************************************************************************* 175 * EP93xx IRQ handling 176 *************************************************************************/ 177 extern void ep93xx_gpio_init_irq(void); 178 179 void __init ep93xx_init_irq(void) 180 { 181 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0); 182 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0); 183 184 ep93xx_gpio_init_irq(); 185 } 186 187 188 /************************************************************************* 189 * EP93xx System Controller Software Locked register handling 190 *************************************************************************/ 191 192 /* 193 * syscon_swlock prevents anything else from writing to the syscon 194 * block while a software locked register is being written. 195 */ 196 static DEFINE_SPINLOCK(syscon_swlock); 197 198 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) 199 { 200 unsigned long flags; 201 202 spin_lock_irqsave(&syscon_swlock, flags); 203 204 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 205 __raw_writel(val, reg); 206 207 spin_unlock_irqrestore(&syscon_swlock, flags); 208 } 209 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write); 210 211 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) 212 { 213 unsigned long flags; 214 unsigned int val; 215 216 spin_lock_irqsave(&syscon_swlock, flags); 217 218 val = __raw_readl(EP93XX_SYSCON_DEVCFG); 219 val &= ~clear_bits; 220 val |= set_bits; 221 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 222 __raw_writel(val, EP93XX_SYSCON_DEVCFG); 223 224 spin_unlock_irqrestore(&syscon_swlock, flags); 225 } 226 EXPORT_SYMBOL(ep93xx_devcfg_set_clear); 227 228 /** 229 * ep93xx_chip_revision() - returns the EP93xx chip revision 230 * 231 * See <mach/platform.h> for more information. 232 */ 233 unsigned int ep93xx_chip_revision(void) 234 { 235 unsigned int v; 236 237 v = __raw_readl(EP93XX_SYSCON_SYSCFG); 238 v &= EP93XX_SYSCON_SYSCFG_REV_MASK; 239 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; 240 return v; 241 } 242 243 /************************************************************************* 244 * EP93xx peripheral handling 245 *************************************************************************/ 246 #define EP93XX_UART_MCR_OFFSET (0x0100) 247 248 static void ep93xx_uart_set_mctrl(struct amba_device *dev, 249 void __iomem *base, unsigned int mctrl) 250 { 251 unsigned int mcr; 252 253 mcr = 0; 254 if (!(mctrl & TIOCM_RTS)) 255 mcr |= 2; 256 if (!(mctrl & TIOCM_DTR)) 257 mcr |= 1; 258 259 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 260 } 261 262 static struct amba_pl010_data ep93xx_uart_data = { 263 .set_mctrl = ep93xx_uart_set_mctrl, 264 }; 265 266 static struct amba_device uart1_device = { 267 .dev = { 268 .init_name = "apb:uart1", 269 .platform_data = &ep93xx_uart_data, 270 }, 271 .res = { 272 .start = EP93XX_UART1_PHYS_BASE, 273 .end = EP93XX_UART1_PHYS_BASE + 0x0fff, 274 .flags = IORESOURCE_MEM, 275 }, 276 .irq = { IRQ_EP93XX_UART1, NO_IRQ }, 277 .periphid = 0x00041010, 278 }; 279 280 static struct amba_device uart2_device = { 281 .dev = { 282 .init_name = "apb:uart2", 283 .platform_data = &ep93xx_uart_data, 284 }, 285 .res = { 286 .start = EP93XX_UART2_PHYS_BASE, 287 .end = EP93XX_UART2_PHYS_BASE + 0x0fff, 288 .flags = IORESOURCE_MEM, 289 }, 290 .irq = { IRQ_EP93XX_UART2, NO_IRQ }, 291 .periphid = 0x00041010, 292 }; 293 294 static struct amba_device uart3_device = { 295 .dev = { 296 .init_name = "apb:uart3", 297 .platform_data = &ep93xx_uart_data, 298 }, 299 .res = { 300 .start = EP93XX_UART3_PHYS_BASE, 301 .end = EP93XX_UART3_PHYS_BASE + 0x0fff, 302 .flags = IORESOURCE_MEM, 303 }, 304 .irq = { IRQ_EP93XX_UART3, NO_IRQ }, 305 .periphid = 0x00041010, 306 }; 307 308 309 static struct resource ep93xx_rtc_resource[] = { 310 { 311 .start = EP93XX_RTC_PHYS_BASE, 312 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1, 313 .flags = IORESOURCE_MEM, 314 }, 315 }; 316 317 static struct platform_device ep93xx_rtc_device = { 318 .name = "ep93xx-rtc", 319 .id = -1, 320 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource), 321 .resource = ep93xx_rtc_resource, 322 }; 323 324 325 static struct resource ep93xx_ohci_resources[] = { 326 [0] = { 327 .start = EP93XX_USB_PHYS_BASE, 328 .end = EP93XX_USB_PHYS_BASE + 0x0fff, 329 .flags = IORESOURCE_MEM, 330 }, 331 [1] = { 332 .start = IRQ_EP93XX_USB, 333 .end = IRQ_EP93XX_USB, 334 .flags = IORESOURCE_IRQ, 335 }, 336 }; 337 338 339 static struct platform_device ep93xx_ohci_device = { 340 .name = "ep93xx-ohci", 341 .id = -1, 342 .dev = { 343 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask, 344 .coherent_dma_mask = DMA_BIT_MASK(32), 345 }, 346 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), 347 .resource = ep93xx_ohci_resources, 348 }; 349 350 351 /************************************************************************* 352 * EP93xx physmap'ed flash 353 *************************************************************************/ 354 static struct physmap_flash_data ep93xx_flash_data; 355 356 static struct resource ep93xx_flash_resource = { 357 .flags = IORESOURCE_MEM, 358 }; 359 360 static struct platform_device ep93xx_flash = { 361 .name = "physmap-flash", 362 .id = 0, 363 .dev = { 364 .platform_data = &ep93xx_flash_data, 365 }, 366 .num_resources = 1, 367 .resource = &ep93xx_flash_resource, 368 }; 369 370 /** 371 * ep93xx_register_flash() - Register the external flash device. 372 * @width: bank width in octets 373 * @start: resource start address 374 * @size: resource size 375 */ 376 void __init ep93xx_register_flash(unsigned int width, 377 resource_size_t start, resource_size_t size) 378 { 379 ep93xx_flash_data.width = width; 380 381 ep93xx_flash_resource.start = start; 382 ep93xx_flash_resource.end = start + size - 1; 383 384 platform_device_register(&ep93xx_flash); 385 } 386 387 388 /************************************************************************* 389 * EP93xx ethernet peripheral handling 390 *************************************************************************/ 391 static struct ep93xx_eth_data ep93xx_eth_data; 392 393 static struct resource ep93xx_eth_resource[] = { 394 { 395 .start = EP93XX_ETHERNET_PHYS_BASE, 396 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, 397 .flags = IORESOURCE_MEM, 398 }, { 399 .start = IRQ_EP93XX_ETHERNET, 400 .end = IRQ_EP93XX_ETHERNET, 401 .flags = IORESOURCE_IRQ, 402 } 403 }; 404 405 static struct platform_device ep93xx_eth_device = { 406 .name = "ep93xx-eth", 407 .id = -1, 408 .dev = { 409 .platform_data = &ep93xx_eth_data, 410 }, 411 .num_resources = ARRAY_SIZE(ep93xx_eth_resource), 412 .resource = ep93xx_eth_resource, 413 }; 414 415 /** 416 * ep93xx_register_eth - Register the built-in ethernet platform device. 417 * @data: platform specific ethernet configuration (__initdata) 418 * @copy_addr: flag indicating that the MAC address should be copied 419 * from the IndAd registers (as programmed by the bootloader) 420 */ 421 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) 422 { 423 if (copy_addr) 424 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6); 425 426 ep93xx_eth_data = *data; 427 platform_device_register(&ep93xx_eth_device); 428 } 429 430 431 /************************************************************************* 432 * EP93xx i2c peripheral handling 433 *************************************************************************/ 434 static struct i2c_gpio_platform_data ep93xx_i2c_data; 435 436 static struct platform_device ep93xx_i2c_device = { 437 .name = "i2c-gpio", 438 .id = 0, 439 .dev = { 440 .platform_data = &ep93xx_i2c_data, 441 }, 442 }; 443 444 /** 445 * ep93xx_register_i2c - Register the i2c platform device. 446 * @data: platform specific i2c-gpio configuration (__initdata) 447 * @devices: platform specific i2c bus device information (__initdata) 448 * @num: the number of devices on the i2c bus 449 */ 450 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, 451 struct i2c_board_info *devices, int num) 452 { 453 /* 454 * Set the EEPROM interface pin drive type control. 455 * Defines the driver type for the EECLK and EEDAT pins as either 456 * open drain, which will require an external pull-up, or a normal 457 * CMOS driver. 458 */ 459 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT) 460 pr_warning("sda != EEDAT, open drain has no effect\n"); 461 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK) 462 pr_warning("scl != EECLK, open drain has no effect\n"); 463 464 __raw_writel((data->sda_is_open_drain << 1) | 465 (data->scl_is_open_drain << 0), 466 EP93XX_GPIO_EEDRIVE); 467 468 ep93xx_i2c_data = *data; 469 i2c_register_board_info(0, devices, num); 470 platform_device_register(&ep93xx_i2c_device); 471 } 472 473 /************************************************************************* 474 * EP93xx SPI peripheral handling 475 *************************************************************************/ 476 static struct ep93xx_spi_info ep93xx_spi_master_data; 477 478 static struct resource ep93xx_spi_resources[] = { 479 { 480 .start = EP93XX_SPI_PHYS_BASE, 481 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1, 482 .flags = IORESOURCE_MEM, 483 }, 484 { 485 .start = IRQ_EP93XX_SSP, 486 .end = IRQ_EP93XX_SSP, 487 .flags = IORESOURCE_IRQ, 488 }, 489 }; 490 491 static struct platform_device ep93xx_spi_device = { 492 .name = "ep93xx-spi", 493 .id = 0, 494 .dev = { 495 .platform_data = &ep93xx_spi_master_data, 496 }, 497 .num_resources = ARRAY_SIZE(ep93xx_spi_resources), 498 .resource = ep93xx_spi_resources, 499 }; 500 501 /** 502 * ep93xx_register_spi() - registers spi platform device 503 * @info: ep93xx board specific spi master info (__initdata) 504 * @devices: SPI devices to register (__initdata) 505 * @num: number of SPI devices to register 506 * 507 * This function registers platform device for the EP93xx SPI controller and 508 * also makes sure that SPI pins are muxed so that I2S is not using those pins. 509 */ 510 void __init ep93xx_register_spi(struct ep93xx_spi_info *info, 511 struct spi_board_info *devices, int num) 512 { 513 /* 514 * When SPI is used, we need to make sure that I2S is muxed off from 515 * SPI pins. 516 */ 517 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP); 518 519 ep93xx_spi_master_data = *info; 520 spi_register_board_info(devices, num); 521 platform_device_register(&ep93xx_spi_device); 522 } 523 524 /************************************************************************* 525 * EP93xx LEDs 526 *************************************************************************/ 527 static struct gpio_led ep93xx_led_pins[] = { 528 { 529 .name = "platform:grled", 530 .gpio = EP93XX_GPIO_LINE_GRLED, 531 }, { 532 .name = "platform:rdled", 533 .gpio = EP93XX_GPIO_LINE_RDLED, 534 }, 535 }; 536 537 static struct gpio_led_platform_data ep93xx_led_data = { 538 .num_leds = ARRAY_SIZE(ep93xx_led_pins), 539 .leds = ep93xx_led_pins, 540 }; 541 542 static struct platform_device ep93xx_leds = { 543 .name = "leds-gpio", 544 .id = -1, 545 .dev = { 546 .platform_data = &ep93xx_led_data, 547 }, 548 }; 549 550 551 /************************************************************************* 552 * EP93xx pwm peripheral handling 553 *************************************************************************/ 554 static struct resource ep93xx_pwm0_resource[] = { 555 { 556 .start = EP93XX_PWM_PHYS_BASE, 557 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1, 558 .flags = IORESOURCE_MEM, 559 }, 560 }; 561 562 static struct platform_device ep93xx_pwm0_device = { 563 .name = "ep93xx-pwm", 564 .id = 0, 565 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource), 566 .resource = ep93xx_pwm0_resource, 567 }; 568 569 static struct resource ep93xx_pwm1_resource[] = { 570 { 571 .start = EP93XX_PWM_PHYS_BASE + 0x20, 572 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1, 573 .flags = IORESOURCE_MEM, 574 }, 575 }; 576 577 static struct platform_device ep93xx_pwm1_device = { 578 .name = "ep93xx-pwm", 579 .id = 1, 580 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource), 581 .resource = ep93xx_pwm1_resource, 582 }; 583 584 void __init ep93xx_register_pwm(int pwm0, int pwm1) 585 { 586 if (pwm0) 587 platform_device_register(&ep93xx_pwm0_device); 588 589 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */ 590 if (pwm1) 591 platform_device_register(&ep93xx_pwm1_device); 592 } 593 594 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) 595 { 596 int err; 597 598 if (pdev->id == 0) { 599 err = 0; 600 } else if (pdev->id == 1) { 601 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14, 602 dev_name(&pdev->dev)); 603 if (err) 604 return err; 605 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0); 606 if (err) 607 goto fail; 608 609 /* PWM 1 output on EGPIO[14] */ 610 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG); 611 } else { 612 err = -ENODEV; 613 } 614 615 return err; 616 617 fail: 618 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 619 return err; 620 } 621 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio); 622 623 void ep93xx_pwm_release_gpio(struct platform_device *pdev) 624 { 625 if (pdev->id == 1) { 626 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14); 627 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 628 629 /* EGPIO[14] used for GPIO */ 630 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG); 631 } 632 } 633 EXPORT_SYMBOL(ep93xx_pwm_release_gpio); 634 635 636 /************************************************************************* 637 * EP93xx video peripheral handling 638 *************************************************************************/ 639 static struct ep93xxfb_mach_info ep93xxfb_data; 640 641 static struct resource ep93xx_fb_resource[] = { 642 { 643 .start = EP93XX_RASTER_PHYS_BASE, 644 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1, 645 .flags = IORESOURCE_MEM, 646 }, 647 }; 648 649 static struct platform_device ep93xx_fb_device = { 650 .name = "ep93xx-fb", 651 .id = -1, 652 .dev = { 653 .platform_data = &ep93xxfb_data, 654 .coherent_dma_mask = DMA_BIT_MASK(32), 655 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, 656 }, 657 .num_resources = ARRAY_SIZE(ep93xx_fb_resource), 658 .resource = ep93xx_fb_resource, 659 }; 660 661 static struct platform_device ep93xx_bl_device = { 662 .name = "ep93xx-bl", 663 .id = -1, 664 }; 665 666 /** 667 * ep93xx_register_fb - Register the framebuffer platform device. 668 * @data: platform specific framebuffer configuration (__initdata) 669 */ 670 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) 671 { 672 ep93xxfb_data = *data; 673 platform_device_register(&ep93xx_fb_device); 674 platform_device_register(&ep93xx_bl_device); 675 } 676 677 678 /************************************************************************* 679 * EP93xx matrix keypad peripheral handling 680 *************************************************************************/ 681 static struct ep93xx_keypad_platform_data ep93xx_keypad_data; 682 683 static struct resource ep93xx_keypad_resource[] = { 684 { 685 .start = EP93XX_KEY_MATRIX_PHYS_BASE, 686 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1, 687 .flags = IORESOURCE_MEM, 688 }, { 689 .start = IRQ_EP93XX_KEY, 690 .end = IRQ_EP93XX_KEY, 691 .flags = IORESOURCE_IRQ, 692 }, 693 }; 694 695 static struct platform_device ep93xx_keypad_device = { 696 .name = "ep93xx-keypad", 697 .id = -1, 698 .dev = { 699 .platform_data = &ep93xx_keypad_data, 700 }, 701 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), 702 .resource = ep93xx_keypad_resource, 703 }; 704 705 /** 706 * ep93xx_register_keypad - Register the keypad platform device. 707 * @data: platform specific keypad configuration (__initdata) 708 */ 709 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) 710 { 711 ep93xx_keypad_data = *data; 712 platform_device_register(&ep93xx_keypad_device); 713 } 714 715 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) 716 { 717 int err; 718 int i; 719 720 for (i = 0; i < 8; i++) { 721 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); 722 if (err) 723 goto fail_gpio_c; 724 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); 725 if (err) 726 goto fail_gpio_d; 727 } 728 729 /* Enable the keypad controller; GPIO ports C and D used for keypad */ 730 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | 731 EP93XX_SYSCON_DEVCFG_GONK); 732 733 return 0; 734 735 fail_gpio_d: 736 gpio_free(EP93XX_GPIO_LINE_C(i)); 737 fail_gpio_c: 738 for ( ; i >= 0; --i) { 739 gpio_free(EP93XX_GPIO_LINE_C(i)); 740 gpio_free(EP93XX_GPIO_LINE_D(i)); 741 } 742 return err; 743 } 744 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); 745 746 void ep93xx_keypad_release_gpio(struct platform_device *pdev) 747 { 748 int i; 749 750 for (i = 0; i < 8; i++) { 751 gpio_free(EP93XX_GPIO_LINE_C(i)); 752 gpio_free(EP93XX_GPIO_LINE_D(i)); 753 } 754 755 /* Disable the keypad controller; GPIO ports C and D used for GPIO */ 756 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 757 EP93XX_SYSCON_DEVCFG_GONK); 758 } 759 EXPORT_SYMBOL(ep93xx_keypad_release_gpio); 760 761 /************************************************************************* 762 * EP93xx I2S audio peripheral handling 763 *************************************************************************/ 764 static struct resource ep93xx_i2s_resource[] = { 765 { 766 .start = EP93XX_I2S_PHYS_BASE, 767 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1, 768 .flags = IORESOURCE_MEM, 769 }, 770 }; 771 772 static struct platform_device ep93xx_i2s_device = { 773 .name = "ep93xx-i2s", 774 .id = -1, 775 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource), 776 .resource = ep93xx_i2s_resource, 777 }; 778 779 static struct platform_device ep93xx_pcm_device = { 780 .name = "ep93xx-pcm-audio", 781 .id = -1, 782 }; 783 784 void __init ep93xx_register_i2s(void) 785 { 786 platform_device_register(&ep93xx_i2s_device); 787 platform_device_register(&ep93xx_pcm_device); 788 } 789 790 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \ 791 EP93XX_SYSCON_DEVCFG_I2SONAC97) 792 793 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ 794 EP93XX_SYSCON_I2SCLKDIV_SPOL) 795 796 int ep93xx_i2s_acquire(unsigned i2s_pins, unsigned i2s_config) 797 { 798 unsigned val; 799 800 /* Sanity check */ 801 if (i2s_pins & ~EP93XX_SYSCON_DEVCFG_I2S_MASK) 802 return -EINVAL; 803 if (i2s_config & ~EP93XX_I2SCLKDIV_MASK) 804 return -EINVAL; 805 806 /* Must have only one of I2SONSSP/I2SONAC97 set */ 807 if ((i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONSSP) == 808 (i2s_pins & EP93XX_SYSCON_DEVCFG_I2SONAC97)) 809 return -EINVAL; 810 811 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); 812 ep93xx_devcfg_set_bits(i2s_pins); 813 814 /* 815 * This is potentially racy with the clock api for i2s_mclk, sclk and 816 * lrclk. Since the i2s driver is the only user of those clocks we 817 * rely on it to prevent parallel use of this function and the 818 * clock api for the i2s clocks. 819 */ 820 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); 821 val &= ~EP93XX_I2SCLKDIV_MASK; 822 val |= i2s_config; 823 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); 824 825 return 0; 826 } 827 EXPORT_SYMBOL(ep93xx_i2s_acquire); 828 829 void ep93xx_i2s_release(void) 830 { 831 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); 832 } 833 EXPORT_SYMBOL(ep93xx_i2s_release); 834 835 /************************************************************************* 836 * EP93xx AC97 audio peripheral handling 837 *************************************************************************/ 838 static struct resource ep93xx_ac97_resources[] = { 839 { 840 .start = EP93XX_AAC_PHYS_BASE, 841 .end = EP93XX_AAC_PHYS_BASE + 0xb0 - 1, 842 .flags = IORESOURCE_MEM, 843 }, 844 { 845 .start = IRQ_EP93XX_AACINTR, 846 .end = IRQ_EP93XX_AACINTR, 847 .flags = IORESOURCE_IRQ, 848 }, 849 }; 850 851 static struct platform_device ep93xx_ac97_device = { 852 .name = "ep93xx-ac97", 853 .id = -1, 854 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources), 855 .resource = ep93xx_ac97_resources, 856 }; 857 858 void __init ep93xx_register_ac97(void) 859 { 860 /* 861 * Make sure that the AC97 pins are not used by I2S. 862 */ 863 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97); 864 865 platform_device_register(&ep93xx_ac97_device); 866 platform_device_register(&ep93xx_pcm_device); 867 } 868 869 extern void ep93xx_gpio_init(void); 870 871 void __init ep93xx_init_devices(void) 872 { 873 /* Disallow access to MaverickCrunch initially */ 874 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA); 875 876 ep93xx_gpio_init(); 877 878 amba_device_register(&uart1_device, &iomem_resource); 879 amba_device_register(&uart2_device, &iomem_resource); 880 amba_device_register(&uart3_device, &iomem_resource); 881 882 platform_device_register(&ep93xx_rtc_device); 883 platform_device_register(&ep93xx_ohci_device); 884 platform_device_register(&ep93xx_leds); 885 } 886