xref: /openbmc/linux/arch/arm/mach-ep93xx/core.c (revision ae213c44)
1 /*
2  * arch/arm/mach-ep93xx/core.c
3  * Core routines for Cirrus EP93xx chips.
4  *
5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7  *
8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9  * role in the ep93xx linux community.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  */
16 
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18 
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sys_soc.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/gpio/machine.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
37 #include <linux/irqchip/arm-vic.h>
38 #include <linux/reboot.h>
39 #include <linux/usb/ohci_pdriver.h>
40 #include <linux/random.h>
41 
42 #include "hardware.h"
43 #include <linux/platform_data/video-ep93xx.h>
44 #include <linux/platform_data/keypad-ep93xx.h>
45 #include <linux/platform_data/spi-ep93xx.h>
46 #include <linux/soc/cirrus/ep93xx.h>
47 
48 #include "gpio-ep93xx.h"
49 
50 #include <asm/mach/arch.h>
51 #include <asm/mach/map.h>
52 
53 #include "soc.h"
54 
55 /*************************************************************************
56  * Static I/O mappings that are needed for all EP93xx platforms
57  *************************************************************************/
58 static struct map_desc ep93xx_io_desc[] __initdata = {
59 	{
60 		.virtual	= EP93XX_AHB_VIRT_BASE,
61 		.pfn		= __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
62 		.length		= EP93XX_AHB_SIZE,
63 		.type		= MT_DEVICE,
64 	}, {
65 		.virtual	= EP93XX_APB_VIRT_BASE,
66 		.pfn		= __phys_to_pfn(EP93XX_APB_PHYS_BASE),
67 		.length		= EP93XX_APB_SIZE,
68 		.type		= MT_DEVICE,
69 	},
70 };
71 
72 void __init ep93xx_map_io(void)
73 {
74 	iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
75 }
76 
77 /*************************************************************************
78  * EP93xx IRQ handling
79  *************************************************************************/
80 void __init ep93xx_init_irq(void)
81 {
82 	vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
83 	vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
84 }
85 
86 
87 /*************************************************************************
88  * EP93xx System Controller Software Locked register handling
89  *************************************************************************/
90 
91 /*
92  * syscon_swlock prevents anything else from writing to the syscon
93  * block while a software locked register is being written.
94  */
95 static DEFINE_SPINLOCK(syscon_swlock);
96 
97 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
98 {
99 	unsigned long flags;
100 
101 	spin_lock_irqsave(&syscon_swlock, flags);
102 
103 	__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
104 	__raw_writel(val, reg);
105 
106 	spin_unlock_irqrestore(&syscon_swlock, flags);
107 }
108 
109 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
110 {
111 	unsigned long flags;
112 	unsigned int val;
113 
114 	spin_lock_irqsave(&syscon_swlock, flags);
115 
116 	val = __raw_readl(EP93XX_SYSCON_DEVCFG);
117 	val &= ~clear_bits;
118 	val |= set_bits;
119 	__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
120 	__raw_writel(val, EP93XX_SYSCON_DEVCFG);
121 
122 	spin_unlock_irqrestore(&syscon_swlock, flags);
123 }
124 
125 /**
126  * ep93xx_chip_revision() - returns the EP93xx chip revision
127  *
128  * See "platform.h" for more information.
129  */
130 unsigned int ep93xx_chip_revision(void)
131 {
132 	unsigned int v;
133 
134 	v = __raw_readl(EP93XX_SYSCON_SYSCFG);
135 	v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
136 	v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
137 	return v;
138 }
139 EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
140 
141 /*************************************************************************
142  * EP93xx GPIO
143  *************************************************************************/
144 static struct resource ep93xx_gpio_resource[] = {
145 	DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
146 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO_AB),
147 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO0MUX),
148 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO1MUX),
149 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO2MUX),
150 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO3MUX),
151 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO4MUX),
152 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO5MUX),
153 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO6MUX),
154 	DEFINE_RES_IRQ(IRQ_EP93XX_GPIO7MUX),
155 };
156 
157 static struct platform_device ep93xx_gpio_device = {
158 	.name		= "gpio-ep93xx",
159 	.id		= -1,
160 	.num_resources	= ARRAY_SIZE(ep93xx_gpio_resource),
161 	.resource	= ep93xx_gpio_resource,
162 };
163 
164 /*************************************************************************
165  * EP93xx peripheral handling
166  *************************************************************************/
167 #define EP93XX_UART_MCR_OFFSET		(0x0100)
168 
169 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
170 				  void __iomem *base, unsigned int mctrl)
171 {
172 	unsigned int mcr;
173 
174 	mcr = 0;
175 	if (mctrl & TIOCM_RTS)
176 		mcr |= 2;
177 	if (mctrl & TIOCM_DTR)
178 		mcr |= 1;
179 
180 	__raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
181 }
182 
183 static struct amba_pl010_data ep93xx_uart_data = {
184 	.set_mctrl	= ep93xx_uart_set_mctrl,
185 };
186 
187 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
188 	{ IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
189 
190 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
191 	{ IRQ_EP93XX_UART2 }, NULL);
192 
193 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
194 	{ IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
195 
196 static struct resource ep93xx_rtc_resource[] = {
197 	DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
198 };
199 
200 static struct platform_device ep93xx_rtc_device = {
201 	.name		= "ep93xx-rtc",
202 	.id		= -1,
203 	.num_resources	= ARRAY_SIZE(ep93xx_rtc_resource),
204 	.resource	= ep93xx_rtc_resource,
205 };
206 
207 /*************************************************************************
208  * EP93xx OHCI USB Host
209  *************************************************************************/
210 
211 static struct clk *ep93xx_ohci_host_clock;
212 
213 static int ep93xx_ohci_power_on(struct platform_device *pdev)
214 {
215 	if (!ep93xx_ohci_host_clock) {
216 		ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
217 		if (IS_ERR(ep93xx_ohci_host_clock))
218 			return PTR_ERR(ep93xx_ohci_host_clock);
219 	}
220 
221 	return clk_enable(ep93xx_ohci_host_clock);
222 }
223 
224 static void ep93xx_ohci_power_off(struct platform_device *pdev)
225 {
226 	clk_disable(ep93xx_ohci_host_clock);
227 }
228 
229 static struct usb_ohci_pdata ep93xx_ohci_pdata = {
230 	.power_on	= ep93xx_ohci_power_on,
231 	.power_off	= ep93xx_ohci_power_off,
232 	.power_suspend	= ep93xx_ohci_power_off,
233 };
234 
235 static struct resource ep93xx_ohci_resources[] = {
236 	DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
237 	DEFINE_RES_IRQ(IRQ_EP93XX_USB),
238 };
239 
240 static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
241 
242 static struct platform_device ep93xx_ohci_device = {
243 	.name		= "ohci-platform",
244 	.id		= -1,
245 	.num_resources	= ARRAY_SIZE(ep93xx_ohci_resources),
246 	.resource	= ep93xx_ohci_resources,
247 	.dev		= {
248 		.dma_mask		= &ep93xx_ohci_dma_mask,
249 		.coherent_dma_mask	= DMA_BIT_MASK(32),
250 		.platform_data		= &ep93xx_ohci_pdata,
251 	},
252 };
253 
254 /*************************************************************************
255  * EP93xx physmap'ed flash
256  *************************************************************************/
257 static struct physmap_flash_data ep93xx_flash_data;
258 
259 static struct resource ep93xx_flash_resource = {
260 	.flags		= IORESOURCE_MEM,
261 };
262 
263 static struct platform_device ep93xx_flash = {
264 	.name		= "physmap-flash",
265 	.id		= 0,
266 	.dev		= {
267 		.platform_data	= &ep93xx_flash_data,
268 	},
269 	.num_resources	= 1,
270 	.resource	= &ep93xx_flash_resource,
271 };
272 
273 /**
274  * ep93xx_register_flash() - Register the external flash device.
275  * @width:	bank width in octets
276  * @start:	resource start address
277  * @size:	resource size
278  */
279 void __init ep93xx_register_flash(unsigned int width,
280 				  resource_size_t start, resource_size_t size)
281 {
282 	ep93xx_flash_data.width		= width;
283 
284 	ep93xx_flash_resource.start	= start;
285 	ep93xx_flash_resource.end	= start + size - 1;
286 
287 	platform_device_register(&ep93xx_flash);
288 }
289 
290 
291 /*************************************************************************
292  * EP93xx ethernet peripheral handling
293  *************************************************************************/
294 static struct ep93xx_eth_data ep93xx_eth_data;
295 
296 static struct resource ep93xx_eth_resource[] = {
297 	DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
298 	DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
299 };
300 
301 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
302 
303 static struct platform_device ep93xx_eth_device = {
304 	.name		= "ep93xx-eth",
305 	.id		= -1,
306 	.dev		= {
307 		.platform_data		= &ep93xx_eth_data,
308 		.coherent_dma_mask	= DMA_BIT_MASK(32),
309 		.dma_mask		= &ep93xx_eth_dma_mask,
310 	},
311 	.num_resources	= ARRAY_SIZE(ep93xx_eth_resource),
312 	.resource	= ep93xx_eth_resource,
313 };
314 
315 /**
316  * ep93xx_register_eth - Register the built-in ethernet platform device.
317  * @data:	platform specific ethernet configuration (__initdata)
318  * @copy_addr:	flag indicating that the MAC address should be copied
319  *		from the IndAd registers (as programmed by the bootloader)
320  */
321 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
322 {
323 	if (copy_addr)
324 		memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
325 
326 	ep93xx_eth_data = *data;
327 	platform_device_register(&ep93xx_eth_device);
328 }
329 
330 
331 /*************************************************************************
332  * EP93xx i2c peripheral handling
333  *************************************************************************/
334 
335 /* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
336 static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
337 	.dev_id		= "i2c-gpio.0",
338 	.table		= {
339 		/* Use local offsets on gpiochip/port "G" */
340 		GPIO_LOOKUP_IDX("G", 1, NULL, 0,
341 				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
342 		GPIO_LOOKUP_IDX("G", 0, NULL, 1,
343 				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
344 	},
345 };
346 
347 static struct platform_device ep93xx_i2c_device = {
348 	.name		= "i2c-gpio",
349 	.id		= 0,
350 	.dev		= {
351 		.platform_data	= NULL,
352 	},
353 };
354 
355 /**
356  * ep93xx_register_i2c - Register the i2c platform device.
357  * @devices:	platform specific i2c bus device information (__initdata)
358  * @num:	the number of devices on the i2c bus
359  */
360 void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
361 {
362 	/*
363 	 * FIXME: this just sets the two pins as non-opendrain, as no
364 	 * platforms tries to do that anyway. Flag the applicable lines
365 	 * as open drain in the GPIO_LOOKUP above and the driver or
366 	 * gpiolib will handle open drain/open drain emulation as need
367 	 * be. Right now i2c-gpio emulates open drain which is not
368 	 * optimal.
369 	 */
370 	__raw_writel((0 << 1) | (0 << 0),
371 		     EP93XX_GPIO_EEDRIVE);
372 
373 	i2c_register_board_info(0, devices, num);
374 	gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
375 	platform_device_register(&ep93xx_i2c_device);
376 }
377 
378 /*************************************************************************
379  * EP93xx SPI peripheral handling
380  *************************************************************************/
381 static struct ep93xx_spi_info ep93xx_spi_master_data;
382 
383 static struct resource ep93xx_spi_resources[] = {
384 	DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
385 	DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
386 };
387 
388 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
389 
390 static struct platform_device ep93xx_spi_device = {
391 	.name		= "ep93xx-spi",
392 	.id		= 0,
393 	.dev		= {
394 		.platform_data		= &ep93xx_spi_master_data,
395 		.coherent_dma_mask	= DMA_BIT_MASK(32),
396 		.dma_mask		= &ep93xx_spi_dma_mask,
397 	},
398 	.num_resources	= ARRAY_SIZE(ep93xx_spi_resources),
399 	.resource	= ep93xx_spi_resources,
400 };
401 
402 /**
403  * ep93xx_register_spi() - registers spi platform device
404  * @info: ep93xx board specific spi master info (__initdata)
405  * @devices: SPI devices to register (__initdata)
406  * @num: number of SPI devices to register
407  *
408  * This function registers platform device for the EP93xx SPI controller and
409  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
410  */
411 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
412 				struct spi_board_info *devices, int num)
413 {
414 	/*
415 	 * When SPI is used, we need to make sure that I2S is muxed off from
416 	 * SPI pins.
417 	 */
418 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
419 
420 	ep93xx_spi_master_data = *info;
421 	spi_register_board_info(devices, num);
422 	platform_device_register(&ep93xx_spi_device);
423 }
424 
425 /*************************************************************************
426  * EP93xx LEDs
427  *************************************************************************/
428 static const struct gpio_led ep93xx_led_pins[] __initconst = {
429 	{
430 		.name	= "platform:grled",
431 		.gpio	= EP93XX_GPIO_LINE_GRLED,
432 	}, {
433 		.name	= "platform:rdled",
434 		.gpio	= EP93XX_GPIO_LINE_RDLED,
435 	},
436 };
437 
438 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
439 	.num_leds	= ARRAY_SIZE(ep93xx_led_pins),
440 	.leds		= ep93xx_led_pins,
441 };
442 
443 /*************************************************************************
444  * EP93xx pwm peripheral handling
445  *************************************************************************/
446 static struct resource ep93xx_pwm0_resource[] = {
447 	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
448 };
449 
450 static struct platform_device ep93xx_pwm0_device = {
451 	.name		= "ep93xx-pwm",
452 	.id		= 0,
453 	.num_resources	= ARRAY_SIZE(ep93xx_pwm0_resource),
454 	.resource	= ep93xx_pwm0_resource,
455 };
456 
457 static struct resource ep93xx_pwm1_resource[] = {
458 	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
459 };
460 
461 static struct platform_device ep93xx_pwm1_device = {
462 	.name		= "ep93xx-pwm",
463 	.id		= 1,
464 	.num_resources	= ARRAY_SIZE(ep93xx_pwm1_resource),
465 	.resource	= ep93xx_pwm1_resource,
466 };
467 
468 void __init ep93xx_register_pwm(int pwm0, int pwm1)
469 {
470 	if (pwm0)
471 		platform_device_register(&ep93xx_pwm0_device);
472 
473 	/* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
474 	if (pwm1)
475 		platform_device_register(&ep93xx_pwm1_device);
476 }
477 
478 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
479 {
480 	int err;
481 
482 	if (pdev->id == 0) {
483 		err = 0;
484 	} else if (pdev->id == 1) {
485 		err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
486 				   dev_name(&pdev->dev));
487 		if (err)
488 			return err;
489 		err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
490 		if (err)
491 			goto fail;
492 
493 		/* PWM 1 output on EGPIO[14] */
494 		ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
495 	} else {
496 		err = -ENODEV;
497 	}
498 
499 	return err;
500 
501 fail:
502 	gpio_free(EP93XX_GPIO_LINE_EGPIO14);
503 	return err;
504 }
505 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
506 
507 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
508 {
509 	if (pdev->id == 1) {
510 		gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
511 		gpio_free(EP93XX_GPIO_LINE_EGPIO14);
512 
513 		/* EGPIO[14] used for GPIO */
514 		ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
515 	}
516 }
517 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
518 
519 
520 /*************************************************************************
521  * EP93xx video peripheral handling
522  *************************************************************************/
523 static struct ep93xxfb_mach_info ep93xxfb_data;
524 
525 static struct resource ep93xx_fb_resource[] = {
526 	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
527 };
528 
529 static struct platform_device ep93xx_fb_device = {
530 	.name			= "ep93xx-fb",
531 	.id			= -1,
532 	.dev			= {
533 		.platform_data		= &ep93xxfb_data,
534 		.coherent_dma_mask	= DMA_BIT_MASK(32),
535 		.dma_mask		= &ep93xx_fb_device.dev.coherent_dma_mask,
536 	},
537 	.num_resources		= ARRAY_SIZE(ep93xx_fb_resource),
538 	.resource		= ep93xx_fb_resource,
539 };
540 
541 /* The backlight use a single register in the framebuffer's register space */
542 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
543 
544 static struct resource ep93xx_bl_resources[] = {
545 	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
546 		       EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
547 };
548 
549 static struct platform_device ep93xx_bl_device = {
550 	.name		= "ep93xx-bl",
551 	.id		= -1,
552 	.num_resources	= ARRAY_SIZE(ep93xx_bl_resources),
553 	.resource	= ep93xx_bl_resources,
554 };
555 
556 /**
557  * ep93xx_register_fb - Register the framebuffer platform device.
558  * @data:	platform specific framebuffer configuration (__initdata)
559  */
560 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
561 {
562 	ep93xxfb_data = *data;
563 	platform_device_register(&ep93xx_fb_device);
564 	platform_device_register(&ep93xx_bl_device);
565 }
566 
567 
568 /*************************************************************************
569  * EP93xx matrix keypad peripheral handling
570  *************************************************************************/
571 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
572 
573 static struct resource ep93xx_keypad_resource[] = {
574 	DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
575 	DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
576 };
577 
578 static struct platform_device ep93xx_keypad_device = {
579 	.name		= "ep93xx-keypad",
580 	.id		= -1,
581 	.dev		= {
582 		.platform_data	= &ep93xx_keypad_data,
583 	},
584 	.num_resources	= ARRAY_SIZE(ep93xx_keypad_resource),
585 	.resource	= ep93xx_keypad_resource,
586 };
587 
588 /**
589  * ep93xx_register_keypad - Register the keypad platform device.
590  * @data:	platform specific keypad configuration (__initdata)
591  */
592 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
593 {
594 	ep93xx_keypad_data = *data;
595 	platform_device_register(&ep93xx_keypad_device);
596 }
597 
598 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
599 {
600 	int err;
601 	int i;
602 
603 	for (i = 0; i < 8; i++) {
604 		err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
605 		if (err)
606 			goto fail_gpio_c;
607 		err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
608 		if (err)
609 			goto fail_gpio_d;
610 	}
611 
612 	/* Enable the keypad controller; GPIO ports C and D used for keypad */
613 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
614 				 EP93XX_SYSCON_DEVCFG_GONK);
615 
616 	return 0;
617 
618 fail_gpio_d:
619 	gpio_free(EP93XX_GPIO_LINE_C(i));
620 fail_gpio_c:
621 	for (--i; i >= 0; --i) {
622 		gpio_free(EP93XX_GPIO_LINE_C(i));
623 		gpio_free(EP93XX_GPIO_LINE_D(i));
624 	}
625 	return err;
626 }
627 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
628 
629 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
630 {
631 	int i;
632 
633 	for (i = 0; i < 8; i++) {
634 		gpio_free(EP93XX_GPIO_LINE_C(i));
635 		gpio_free(EP93XX_GPIO_LINE_D(i));
636 	}
637 
638 	/* Disable the keypad controller; GPIO ports C and D used for GPIO */
639 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
640 			       EP93XX_SYSCON_DEVCFG_GONK);
641 }
642 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
643 
644 /*************************************************************************
645  * EP93xx I2S audio peripheral handling
646  *************************************************************************/
647 static struct resource ep93xx_i2s_resource[] = {
648 	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
649 	DEFINE_RES_IRQ(IRQ_EP93XX_SAI),
650 };
651 
652 static struct platform_device ep93xx_i2s_device = {
653 	.name		= "ep93xx-i2s",
654 	.id		= -1,
655 	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
656 	.resource	= ep93xx_i2s_resource,
657 };
658 
659 static struct platform_device ep93xx_pcm_device = {
660 	.name		= "ep93xx-pcm-audio",
661 	.id		= -1,
662 };
663 
664 void __init ep93xx_register_i2s(void)
665 {
666 	platform_device_register(&ep93xx_i2s_device);
667 	platform_device_register(&ep93xx_pcm_device);
668 }
669 
670 #define EP93XX_SYSCON_DEVCFG_I2S_MASK	(EP93XX_SYSCON_DEVCFG_I2SONSSP | \
671 					 EP93XX_SYSCON_DEVCFG_I2SONAC97)
672 
673 #define EP93XX_I2SCLKDIV_MASK		(EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
674 					 EP93XX_SYSCON_I2SCLKDIV_SPOL)
675 
676 int ep93xx_i2s_acquire(void)
677 {
678 	unsigned val;
679 
680 	ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
681 			EP93XX_SYSCON_DEVCFG_I2S_MASK);
682 
683 	/*
684 	 * This is potentially racy with the clock api for i2s_mclk, sclk and
685 	 * lrclk. Since the i2s driver is the only user of those clocks we
686 	 * rely on it to prevent parallel use of this function and the
687 	 * clock api for the i2s clocks.
688 	 */
689 	val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
690 	val &= ~EP93XX_I2SCLKDIV_MASK;
691 	val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
692 	ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
693 
694 	return 0;
695 }
696 EXPORT_SYMBOL(ep93xx_i2s_acquire);
697 
698 void ep93xx_i2s_release(void)
699 {
700 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
701 }
702 EXPORT_SYMBOL(ep93xx_i2s_release);
703 
704 /*************************************************************************
705  * EP93xx AC97 audio peripheral handling
706  *************************************************************************/
707 static struct resource ep93xx_ac97_resources[] = {
708 	DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
709 	DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
710 };
711 
712 static struct platform_device ep93xx_ac97_device = {
713 	.name		= "ep93xx-ac97",
714 	.id		= -1,
715 	.num_resources	= ARRAY_SIZE(ep93xx_ac97_resources),
716 	.resource	= ep93xx_ac97_resources,
717 };
718 
719 void __init ep93xx_register_ac97(void)
720 {
721 	/*
722 	 * Make sure that the AC97 pins are not used by I2S.
723 	 */
724 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
725 
726 	platform_device_register(&ep93xx_ac97_device);
727 	platform_device_register(&ep93xx_pcm_device);
728 }
729 
730 /*************************************************************************
731  * EP93xx Watchdog
732  *************************************************************************/
733 static struct resource ep93xx_wdt_resources[] = {
734 	DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
735 };
736 
737 static struct platform_device ep93xx_wdt_device = {
738 	.name		= "ep93xx-wdt",
739 	.id		= -1,
740 	.num_resources	= ARRAY_SIZE(ep93xx_wdt_resources),
741 	.resource	= ep93xx_wdt_resources,
742 };
743 
744 /*************************************************************************
745  * EP93xx IDE
746  *************************************************************************/
747 static struct resource ep93xx_ide_resources[] = {
748 	DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
749 	DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
750 };
751 
752 static struct platform_device ep93xx_ide_device = {
753 	.name		= "ep93xx-ide",
754 	.id		= -1,
755 	.dev		= {
756 		.dma_mask		= &ep93xx_ide_device.dev.coherent_dma_mask,
757 		.coherent_dma_mask	= DMA_BIT_MASK(32),
758 	},
759 	.num_resources	= ARRAY_SIZE(ep93xx_ide_resources),
760 	.resource	= ep93xx_ide_resources,
761 };
762 
763 void __init ep93xx_register_ide(void)
764 {
765 	platform_device_register(&ep93xx_ide_device);
766 }
767 
768 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
769 {
770 	int err;
771 	int i;
772 
773 	err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
774 	if (err)
775 		return err;
776 	err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
777 	if (err)
778 		goto fail_egpio15;
779 	for (i = 2; i < 8; i++) {
780 		err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
781 		if (err)
782 			goto fail_gpio_e;
783 	}
784 	for (i = 4; i < 8; i++) {
785 		err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
786 		if (err)
787 			goto fail_gpio_g;
788 	}
789 	for (i = 0; i < 8; i++) {
790 		err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
791 		if (err)
792 			goto fail_gpio_h;
793 	}
794 
795 	/* GPIO ports E[7:2], G[7:4] and H used by IDE */
796 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
797 				 EP93XX_SYSCON_DEVCFG_GONIDE |
798 				 EP93XX_SYSCON_DEVCFG_HONIDE);
799 	return 0;
800 
801 fail_gpio_h:
802 	for (--i; i >= 0; --i)
803 		gpio_free(EP93XX_GPIO_LINE_H(i));
804 	i = 8;
805 fail_gpio_g:
806 	for (--i; i >= 4; --i)
807 		gpio_free(EP93XX_GPIO_LINE_G(i));
808 	i = 8;
809 fail_gpio_e:
810 	for (--i; i >= 2; --i)
811 		gpio_free(EP93XX_GPIO_LINE_E(i));
812 	gpio_free(EP93XX_GPIO_LINE_EGPIO15);
813 fail_egpio15:
814 	gpio_free(EP93XX_GPIO_LINE_EGPIO2);
815 	return err;
816 }
817 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
818 
819 void ep93xx_ide_release_gpio(struct platform_device *pdev)
820 {
821 	int i;
822 
823 	for (i = 2; i < 8; i++)
824 		gpio_free(EP93XX_GPIO_LINE_E(i));
825 	for (i = 4; i < 8; i++)
826 		gpio_free(EP93XX_GPIO_LINE_G(i));
827 	for (i = 0; i < 8; i++)
828 		gpio_free(EP93XX_GPIO_LINE_H(i));
829 	gpio_free(EP93XX_GPIO_LINE_EGPIO15);
830 	gpio_free(EP93XX_GPIO_LINE_EGPIO2);
831 
832 
833 	/* GPIO ports E[7:2], G[7:4] and H used by GPIO */
834 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
835 			       EP93XX_SYSCON_DEVCFG_GONIDE |
836 			       EP93XX_SYSCON_DEVCFG_HONIDE);
837 }
838 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
839 
840 /*************************************************************************
841  * EP93xx ADC
842  *************************************************************************/
843 static struct resource ep93xx_adc_resources[] = {
844 	DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
845 	DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
846 };
847 
848 static struct platform_device ep93xx_adc_device = {
849 	.name		= "ep93xx-adc",
850 	.id		= -1,
851 	.num_resources	= ARRAY_SIZE(ep93xx_adc_resources),
852 	.resource	= ep93xx_adc_resources,
853 };
854 
855 void __init ep93xx_register_adc(void)
856 {
857 	/* Power up ADC, deactivate Touch Screen Controller */
858 	ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
859 				EP93XX_SYSCON_DEVCFG_ADCPD);
860 
861 	platform_device_register(&ep93xx_adc_device);
862 }
863 
864 /*************************************************************************
865  * EP93xx Security peripheral
866  *************************************************************************/
867 
868 /*
869  * The Maverick Key is 256 bits of micro fuses blown at the factory during
870  * manufacturing to uniquely identify a part.
871  *
872  * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
873  */
874 #define EP93XX_SECURITY_REG(x)		(EP93XX_SECURITY_BASE + (x))
875 #define EP93XX_SECURITY_SECFLG		EP93XX_SECURITY_REG(0x2400)
876 #define EP93XX_SECURITY_FUSEFLG		EP93XX_SECURITY_REG(0x2410)
877 #define EP93XX_SECURITY_UNIQID		EP93XX_SECURITY_REG(0x2440)
878 #define EP93XX_SECURITY_UNIQCHK		EP93XX_SECURITY_REG(0x2450)
879 #define EP93XX_SECURITY_UNIQVAL		EP93XX_SECURITY_REG(0x2460)
880 #define EP93XX_SECURITY_SECID1		EP93XX_SECURITY_REG(0x2500)
881 #define EP93XX_SECURITY_SECID2		EP93XX_SECURITY_REG(0x2504)
882 #define EP93XX_SECURITY_SECCHK1		EP93XX_SECURITY_REG(0x2520)
883 #define EP93XX_SECURITY_SECCHK2		EP93XX_SECURITY_REG(0x2524)
884 #define EP93XX_SECURITY_UNIQID2		EP93XX_SECURITY_REG(0x2700)
885 #define EP93XX_SECURITY_UNIQID3		EP93XX_SECURITY_REG(0x2704)
886 #define EP93XX_SECURITY_UNIQID4		EP93XX_SECURITY_REG(0x2708)
887 #define EP93XX_SECURITY_UNIQID5		EP93XX_SECURITY_REG(0x270c)
888 
889 static char ep93xx_soc_id[33];
890 
891 static const char __init *ep93xx_get_soc_id(void)
892 {
893 	unsigned int id, id2, id3, id4, id5;
894 
895 	if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
896 		return "bad Hamming code";
897 
898 	id = __raw_readl(EP93XX_SECURITY_UNIQID);
899 	id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
900 	id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
901 	id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
902 	id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
903 
904 	if (id != id2)
905 		return "invalid";
906 
907 	/* Toss the unique ID into the entropy pool */
908 	add_device_randomness(&id2, 4);
909 	add_device_randomness(&id3, 4);
910 	add_device_randomness(&id4, 4);
911 	add_device_randomness(&id5, 4);
912 
913 	snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
914 		 "%08x%08x%08x%08x", id2, id3, id4, id5);
915 
916 	return ep93xx_soc_id;
917 }
918 
919 static const char __init *ep93xx_get_soc_rev(void)
920 {
921 	int rev = ep93xx_chip_revision();
922 
923 	switch (rev) {
924 	case EP93XX_CHIP_REV_D0:
925 		return "D0";
926 	case EP93XX_CHIP_REV_D1:
927 		return "D1";
928 	case EP93XX_CHIP_REV_E0:
929 		return "E0";
930 	case EP93XX_CHIP_REV_E1:
931 		return "E1";
932 	case EP93XX_CHIP_REV_E2:
933 		return "E2";
934 	default:
935 		return "unknown";
936 	}
937 }
938 
939 static const char __init *ep93xx_get_machine_name(void)
940 {
941 	return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
942 }
943 
944 static struct device __init *ep93xx_init_soc(void)
945 {
946 	struct soc_device_attribute *soc_dev_attr;
947 	struct soc_device *soc_dev;
948 
949 	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
950 	if (!soc_dev_attr)
951 		return NULL;
952 
953 	soc_dev_attr->machine = ep93xx_get_machine_name();
954 	soc_dev_attr->family = "Cirrus Logic EP93xx";
955 	soc_dev_attr->revision = ep93xx_get_soc_rev();
956 	soc_dev_attr->soc_id = ep93xx_get_soc_id();
957 
958 	soc_dev = soc_device_register(soc_dev_attr);
959 	if (IS_ERR(soc_dev)) {
960 		kfree(soc_dev_attr->machine);
961 		kfree(soc_dev_attr);
962 		return NULL;
963 	}
964 
965 	return soc_device_to_device(soc_dev);
966 }
967 
968 struct device __init *ep93xx_init_devices(void)
969 {
970 	struct device *parent;
971 
972 	/* Disallow access to MaverickCrunch initially */
973 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
974 
975 	/* Default all ports to GPIO */
976 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
977 			       EP93XX_SYSCON_DEVCFG_GONK |
978 			       EP93XX_SYSCON_DEVCFG_EONIDE |
979 			       EP93XX_SYSCON_DEVCFG_GONIDE |
980 			       EP93XX_SYSCON_DEVCFG_HONIDE);
981 
982 	parent = ep93xx_init_soc();
983 
984 	/* Get the GPIO working early, other devices need it */
985 	platform_device_register(&ep93xx_gpio_device);
986 
987 	amba_device_register(&uart1_device, &iomem_resource);
988 	amba_device_register(&uart2_device, &iomem_resource);
989 	amba_device_register(&uart3_device, &iomem_resource);
990 
991 	platform_device_register(&ep93xx_rtc_device);
992 	platform_device_register(&ep93xx_ohci_device);
993 	platform_device_register(&ep93xx_wdt_device);
994 
995 	gpio_led_register_device(-1, &ep93xx_led_data);
996 
997 	return parent;
998 }
999 
1000 void ep93xx_restart(enum reboot_mode mode, const char *cmd)
1001 {
1002 	/*
1003 	 * Set then clear the SWRST bit to initiate a software reset
1004 	 */
1005 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
1006 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
1007 
1008 	while (1)
1009 		;
1010 }
1011 
1012 void __init ep93xx_init_late(void)
1013 {
1014 	crunch_init();
1015 }
1016