xref: /openbmc/linux/arch/arm/mach-ep93xx/core.c (revision aa1f10e8)
1 /*
2  * arch/arm/mach-ep93xx/core.c
3  * Core routines for Cirrus EP93xx chips.
4  *
5  * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
6  * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org>
7  *
8  * Thanks go to Michael Burian and Ray Lehtiniemi for their key
9  * role in the ep93xx linux community.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or (at
14  * your option) any later version.
15  */
16 
17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt
18 
19 #include <linux/kernel.h>
20 #include <linux/init.h>
21 #include <linux/platform_device.h>
22 #include <linux/interrupt.h>
23 #include <linux/dma-mapping.h>
24 #include <linux/sys_soc.h>
25 #include <linux/irq.h>
26 #include <linux/io.h>
27 #include <linux/gpio.h>
28 #include <linux/leds.h>
29 #include <linux/termios.h>
30 #include <linux/amba/bus.h>
31 #include <linux/amba/serial.h>
32 #include <linux/mtd/physmap.h>
33 #include <linux/i2c.h>
34 #include <linux/gpio/machine.h>
35 #include <linux/spi/spi.h>
36 #include <linux/export.h>
37 #include <linux/irqchip/arm-vic.h>
38 #include <linux/reboot.h>
39 #include <linux/usb/ohci_pdriver.h>
40 #include <linux/random.h>
41 
42 #include <mach/hardware.h>
43 #include <linux/platform_data/video-ep93xx.h>
44 #include <linux/platform_data/keypad-ep93xx.h>
45 #include <linux/platform_data/spi-ep93xx.h>
46 #include <mach/gpio-ep93xx.h>
47 
48 #include <asm/mach/arch.h>
49 #include <asm/mach/map.h>
50 
51 #include "soc.h"
52 
53 /*************************************************************************
54  * Static I/O mappings that are needed for all EP93xx platforms
55  *************************************************************************/
56 static struct map_desc ep93xx_io_desc[] __initdata = {
57 	{
58 		.virtual	= EP93XX_AHB_VIRT_BASE,
59 		.pfn		= __phys_to_pfn(EP93XX_AHB_PHYS_BASE),
60 		.length		= EP93XX_AHB_SIZE,
61 		.type		= MT_DEVICE,
62 	}, {
63 		.virtual	= EP93XX_APB_VIRT_BASE,
64 		.pfn		= __phys_to_pfn(EP93XX_APB_PHYS_BASE),
65 		.length		= EP93XX_APB_SIZE,
66 		.type		= MT_DEVICE,
67 	},
68 };
69 
70 void __init ep93xx_map_io(void)
71 {
72 	iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc));
73 }
74 
75 /*************************************************************************
76  * EP93xx IRQ handling
77  *************************************************************************/
78 void __init ep93xx_init_irq(void)
79 {
80 	vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
81 	vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
82 }
83 
84 
85 /*************************************************************************
86  * EP93xx System Controller Software Locked register handling
87  *************************************************************************/
88 
89 /*
90  * syscon_swlock prevents anything else from writing to the syscon
91  * block while a software locked register is being written.
92  */
93 static DEFINE_SPINLOCK(syscon_swlock);
94 
95 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg)
96 {
97 	unsigned long flags;
98 
99 	spin_lock_irqsave(&syscon_swlock, flags);
100 
101 	__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
102 	__raw_writel(val, reg);
103 
104 	spin_unlock_irqrestore(&syscon_swlock, flags);
105 }
106 
107 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits)
108 {
109 	unsigned long flags;
110 	unsigned int val;
111 
112 	spin_lock_irqsave(&syscon_swlock, flags);
113 
114 	val = __raw_readl(EP93XX_SYSCON_DEVCFG);
115 	val &= ~clear_bits;
116 	val |= set_bits;
117 	__raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
118 	__raw_writel(val, EP93XX_SYSCON_DEVCFG);
119 
120 	spin_unlock_irqrestore(&syscon_swlock, flags);
121 }
122 
123 /**
124  * ep93xx_chip_revision() - returns the EP93xx chip revision
125  *
126  * See <mach/platform.h> for more information.
127  */
128 unsigned int ep93xx_chip_revision(void)
129 {
130 	unsigned int v;
131 
132 	v = __raw_readl(EP93XX_SYSCON_SYSCFG);
133 	v &= EP93XX_SYSCON_SYSCFG_REV_MASK;
134 	v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT;
135 	return v;
136 }
137 EXPORT_SYMBOL_GPL(ep93xx_chip_revision);
138 
139 /*************************************************************************
140  * EP93xx GPIO
141  *************************************************************************/
142 static struct resource ep93xx_gpio_resource[] = {
143 	DEFINE_RES_MEM(EP93XX_GPIO_PHYS_BASE, 0xcc),
144 };
145 
146 static struct platform_device ep93xx_gpio_device = {
147 	.name		= "gpio-ep93xx",
148 	.id		= -1,
149 	.num_resources	= ARRAY_SIZE(ep93xx_gpio_resource),
150 	.resource	= ep93xx_gpio_resource,
151 };
152 
153 /*************************************************************************
154  * EP93xx peripheral handling
155  *************************************************************************/
156 #define EP93XX_UART_MCR_OFFSET		(0x0100)
157 
158 static void ep93xx_uart_set_mctrl(struct amba_device *dev,
159 				  void __iomem *base, unsigned int mctrl)
160 {
161 	unsigned int mcr;
162 
163 	mcr = 0;
164 	if (mctrl & TIOCM_RTS)
165 		mcr |= 2;
166 	if (mctrl & TIOCM_DTR)
167 		mcr |= 1;
168 
169 	__raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
170 }
171 
172 static struct amba_pl010_data ep93xx_uart_data = {
173 	.set_mctrl	= ep93xx_uart_set_mctrl,
174 };
175 
176 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE,
177 	{ IRQ_EP93XX_UART1 }, &ep93xx_uart_data);
178 
179 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE,
180 	{ IRQ_EP93XX_UART2 }, NULL);
181 
182 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE,
183 	{ IRQ_EP93XX_UART3 }, &ep93xx_uart_data);
184 
185 static struct resource ep93xx_rtc_resource[] = {
186 	DEFINE_RES_MEM(EP93XX_RTC_PHYS_BASE, 0x10c),
187 };
188 
189 static struct platform_device ep93xx_rtc_device = {
190 	.name		= "ep93xx-rtc",
191 	.id		= -1,
192 	.num_resources	= ARRAY_SIZE(ep93xx_rtc_resource),
193 	.resource	= ep93xx_rtc_resource,
194 };
195 
196 /*************************************************************************
197  * EP93xx OHCI USB Host
198  *************************************************************************/
199 
200 static struct clk *ep93xx_ohci_host_clock;
201 
202 static int ep93xx_ohci_power_on(struct platform_device *pdev)
203 {
204 	if (!ep93xx_ohci_host_clock) {
205 		ep93xx_ohci_host_clock = devm_clk_get(&pdev->dev, NULL);
206 		if (IS_ERR(ep93xx_ohci_host_clock))
207 			return PTR_ERR(ep93xx_ohci_host_clock);
208 	}
209 
210 	return clk_enable(ep93xx_ohci_host_clock);
211 }
212 
213 static void ep93xx_ohci_power_off(struct platform_device *pdev)
214 {
215 	clk_disable(ep93xx_ohci_host_clock);
216 }
217 
218 static struct usb_ohci_pdata ep93xx_ohci_pdata = {
219 	.power_on	= ep93xx_ohci_power_on,
220 	.power_off	= ep93xx_ohci_power_off,
221 	.power_suspend	= ep93xx_ohci_power_off,
222 };
223 
224 static struct resource ep93xx_ohci_resources[] = {
225 	DEFINE_RES_MEM(EP93XX_USB_PHYS_BASE, 0x1000),
226 	DEFINE_RES_IRQ(IRQ_EP93XX_USB),
227 };
228 
229 static u64 ep93xx_ohci_dma_mask = DMA_BIT_MASK(32);
230 
231 static struct platform_device ep93xx_ohci_device = {
232 	.name		= "ohci-platform",
233 	.id		= -1,
234 	.num_resources	= ARRAY_SIZE(ep93xx_ohci_resources),
235 	.resource	= ep93xx_ohci_resources,
236 	.dev		= {
237 		.dma_mask		= &ep93xx_ohci_dma_mask,
238 		.coherent_dma_mask	= DMA_BIT_MASK(32),
239 		.platform_data		= &ep93xx_ohci_pdata,
240 	},
241 };
242 
243 /*************************************************************************
244  * EP93xx physmap'ed flash
245  *************************************************************************/
246 static struct physmap_flash_data ep93xx_flash_data;
247 
248 static struct resource ep93xx_flash_resource = {
249 	.flags		= IORESOURCE_MEM,
250 };
251 
252 static struct platform_device ep93xx_flash = {
253 	.name		= "physmap-flash",
254 	.id		= 0,
255 	.dev		= {
256 		.platform_data	= &ep93xx_flash_data,
257 	},
258 	.num_resources	= 1,
259 	.resource	= &ep93xx_flash_resource,
260 };
261 
262 /**
263  * ep93xx_register_flash() - Register the external flash device.
264  * @width:	bank width in octets
265  * @start:	resource start address
266  * @size:	resource size
267  */
268 void __init ep93xx_register_flash(unsigned int width,
269 				  resource_size_t start, resource_size_t size)
270 {
271 	ep93xx_flash_data.width		= width;
272 
273 	ep93xx_flash_resource.start	= start;
274 	ep93xx_flash_resource.end	= start + size - 1;
275 
276 	platform_device_register(&ep93xx_flash);
277 }
278 
279 
280 /*************************************************************************
281  * EP93xx ethernet peripheral handling
282  *************************************************************************/
283 static struct ep93xx_eth_data ep93xx_eth_data;
284 
285 static struct resource ep93xx_eth_resource[] = {
286 	DEFINE_RES_MEM(EP93XX_ETHERNET_PHYS_BASE, 0x10000),
287 	DEFINE_RES_IRQ(IRQ_EP93XX_ETHERNET),
288 };
289 
290 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32);
291 
292 static struct platform_device ep93xx_eth_device = {
293 	.name		= "ep93xx-eth",
294 	.id		= -1,
295 	.dev		= {
296 		.platform_data		= &ep93xx_eth_data,
297 		.coherent_dma_mask	= DMA_BIT_MASK(32),
298 		.dma_mask		= &ep93xx_eth_dma_mask,
299 	},
300 	.num_resources	= ARRAY_SIZE(ep93xx_eth_resource),
301 	.resource	= ep93xx_eth_resource,
302 };
303 
304 /**
305  * ep93xx_register_eth - Register the built-in ethernet platform device.
306  * @data:	platform specific ethernet configuration (__initdata)
307  * @copy_addr:	flag indicating that the MAC address should be copied
308  *		from the IndAd registers (as programmed by the bootloader)
309  */
310 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr)
311 {
312 	if (copy_addr)
313 		memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6);
314 
315 	ep93xx_eth_data = *data;
316 	platform_device_register(&ep93xx_eth_device);
317 }
318 
319 
320 /*************************************************************************
321  * EP93xx i2c peripheral handling
322  *************************************************************************/
323 
324 /* All EP93xx devices use the same two GPIO pins for I2C bit-banging */
325 static struct gpiod_lookup_table ep93xx_i2c_gpiod_table = {
326 	.dev_id		= "i2c-gpio",
327 	.table		= {
328 		/* Use local offsets on gpiochip/port "G" */
329 		GPIO_LOOKUP_IDX("G", 1, NULL, 0,
330 				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
331 		GPIO_LOOKUP_IDX("G", 0, NULL, 1,
332 				GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN),
333 	},
334 };
335 
336 static struct platform_device ep93xx_i2c_device = {
337 	.name		= "i2c-gpio",
338 	.id		= 0,
339 	.dev		= {
340 		.platform_data	= NULL,
341 	},
342 };
343 
344 /**
345  * ep93xx_register_i2c - Register the i2c platform device.
346  * @devices:	platform specific i2c bus device information (__initdata)
347  * @num:	the number of devices on the i2c bus
348  */
349 void __init ep93xx_register_i2c(struct i2c_board_info *devices, int num)
350 {
351 	/*
352 	 * FIXME: this just sets the two pins as non-opendrain, as no
353 	 * platforms tries to do that anyway. Flag the applicable lines
354 	 * as open drain in the GPIO_LOOKUP above and the driver or
355 	 * gpiolib will handle open drain/open drain emulation as need
356 	 * be. Right now i2c-gpio emulates open drain which is not
357 	 * optimal.
358 	 */
359 	__raw_writel((0 << 1) | (0 << 0),
360 		     EP93XX_GPIO_EEDRIVE);
361 
362 	i2c_register_board_info(0, devices, num);
363 	gpiod_add_lookup_table(&ep93xx_i2c_gpiod_table);
364 	platform_device_register(&ep93xx_i2c_device);
365 }
366 
367 /*************************************************************************
368  * EP93xx SPI peripheral handling
369  *************************************************************************/
370 static struct ep93xx_spi_info ep93xx_spi_master_data;
371 
372 static struct resource ep93xx_spi_resources[] = {
373 	DEFINE_RES_MEM(EP93XX_SPI_PHYS_BASE, 0x18),
374 	DEFINE_RES_IRQ(IRQ_EP93XX_SSP),
375 };
376 
377 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32);
378 
379 static struct platform_device ep93xx_spi_device = {
380 	.name		= "ep93xx-spi",
381 	.id		= 0,
382 	.dev		= {
383 		.platform_data		= &ep93xx_spi_master_data,
384 		.coherent_dma_mask	= DMA_BIT_MASK(32),
385 		.dma_mask		= &ep93xx_spi_dma_mask,
386 	},
387 	.num_resources	= ARRAY_SIZE(ep93xx_spi_resources),
388 	.resource	= ep93xx_spi_resources,
389 };
390 
391 /**
392  * ep93xx_register_spi() - registers spi platform device
393  * @info: ep93xx board specific spi master info (__initdata)
394  * @devices: SPI devices to register (__initdata)
395  * @num: number of SPI devices to register
396  *
397  * This function registers platform device for the EP93xx SPI controller and
398  * also makes sure that SPI pins are muxed so that I2S is not using those pins.
399  */
400 void __init ep93xx_register_spi(struct ep93xx_spi_info *info,
401 				struct spi_board_info *devices, int num)
402 {
403 	/*
404 	 * When SPI is used, we need to make sure that I2S is muxed off from
405 	 * SPI pins.
406 	 */
407 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP);
408 
409 	ep93xx_spi_master_data = *info;
410 	spi_register_board_info(devices, num);
411 	platform_device_register(&ep93xx_spi_device);
412 }
413 
414 /*************************************************************************
415  * EP93xx LEDs
416  *************************************************************************/
417 static const struct gpio_led ep93xx_led_pins[] __initconst = {
418 	{
419 		.name	= "platform:grled",
420 		.gpio	= EP93XX_GPIO_LINE_GRLED,
421 	}, {
422 		.name	= "platform:rdled",
423 		.gpio	= EP93XX_GPIO_LINE_RDLED,
424 	},
425 };
426 
427 static const struct gpio_led_platform_data ep93xx_led_data __initconst = {
428 	.num_leds	= ARRAY_SIZE(ep93xx_led_pins),
429 	.leds		= ep93xx_led_pins,
430 };
431 
432 /*************************************************************************
433  * EP93xx pwm peripheral handling
434  *************************************************************************/
435 static struct resource ep93xx_pwm0_resource[] = {
436 	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE, 0x10),
437 };
438 
439 static struct platform_device ep93xx_pwm0_device = {
440 	.name		= "ep93xx-pwm",
441 	.id		= 0,
442 	.num_resources	= ARRAY_SIZE(ep93xx_pwm0_resource),
443 	.resource	= ep93xx_pwm0_resource,
444 };
445 
446 static struct resource ep93xx_pwm1_resource[] = {
447 	DEFINE_RES_MEM(EP93XX_PWM_PHYS_BASE + 0x20, 0x10),
448 };
449 
450 static struct platform_device ep93xx_pwm1_device = {
451 	.name		= "ep93xx-pwm",
452 	.id		= 1,
453 	.num_resources	= ARRAY_SIZE(ep93xx_pwm1_resource),
454 	.resource	= ep93xx_pwm1_resource,
455 };
456 
457 void __init ep93xx_register_pwm(int pwm0, int pwm1)
458 {
459 	if (pwm0)
460 		platform_device_register(&ep93xx_pwm0_device);
461 
462 	/* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */
463 	if (pwm1)
464 		platform_device_register(&ep93xx_pwm1_device);
465 }
466 
467 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev)
468 {
469 	int err;
470 
471 	if (pdev->id == 0) {
472 		err = 0;
473 	} else if (pdev->id == 1) {
474 		err = gpio_request(EP93XX_GPIO_LINE_EGPIO14,
475 				   dev_name(&pdev->dev));
476 		if (err)
477 			return err;
478 		err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0);
479 		if (err)
480 			goto fail;
481 
482 		/* PWM 1 output on EGPIO[14] */
483 		ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG);
484 	} else {
485 		err = -ENODEV;
486 	}
487 
488 	return err;
489 
490 fail:
491 	gpio_free(EP93XX_GPIO_LINE_EGPIO14);
492 	return err;
493 }
494 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio);
495 
496 void ep93xx_pwm_release_gpio(struct platform_device *pdev)
497 {
498 	if (pdev->id == 1) {
499 		gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14);
500 		gpio_free(EP93XX_GPIO_LINE_EGPIO14);
501 
502 		/* EGPIO[14] used for GPIO */
503 		ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG);
504 	}
505 }
506 EXPORT_SYMBOL(ep93xx_pwm_release_gpio);
507 
508 
509 /*************************************************************************
510  * EP93xx video peripheral handling
511  *************************************************************************/
512 static struct ep93xxfb_mach_info ep93xxfb_data;
513 
514 static struct resource ep93xx_fb_resource[] = {
515 	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE, 0x800),
516 };
517 
518 static struct platform_device ep93xx_fb_device = {
519 	.name			= "ep93xx-fb",
520 	.id			= -1,
521 	.dev			= {
522 		.platform_data		= &ep93xxfb_data,
523 		.coherent_dma_mask	= DMA_BIT_MASK(32),
524 		.dma_mask		= &ep93xx_fb_device.dev.coherent_dma_mask,
525 	},
526 	.num_resources		= ARRAY_SIZE(ep93xx_fb_resource),
527 	.resource		= ep93xx_fb_resource,
528 };
529 
530 /* The backlight use a single register in the framebuffer's register space */
531 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20
532 
533 static struct resource ep93xx_bl_resources[] = {
534 	DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE +
535 		       EP93XX_RASTER_REG_BRIGHTNESS, 0x04),
536 };
537 
538 static struct platform_device ep93xx_bl_device = {
539 	.name		= "ep93xx-bl",
540 	.id		= -1,
541 	.num_resources	= ARRAY_SIZE(ep93xx_bl_resources),
542 	.resource	= ep93xx_bl_resources,
543 };
544 
545 /**
546  * ep93xx_register_fb - Register the framebuffer platform device.
547  * @data:	platform specific framebuffer configuration (__initdata)
548  */
549 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data)
550 {
551 	ep93xxfb_data = *data;
552 	platform_device_register(&ep93xx_fb_device);
553 	platform_device_register(&ep93xx_bl_device);
554 }
555 
556 
557 /*************************************************************************
558  * EP93xx matrix keypad peripheral handling
559  *************************************************************************/
560 static struct ep93xx_keypad_platform_data ep93xx_keypad_data;
561 
562 static struct resource ep93xx_keypad_resource[] = {
563 	DEFINE_RES_MEM(EP93XX_KEY_MATRIX_PHYS_BASE, 0x0c),
564 	DEFINE_RES_IRQ(IRQ_EP93XX_KEY),
565 };
566 
567 static struct platform_device ep93xx_keypad_device = {
568 	.name		= "ep93xx-keypad",
569 	.id		= -1,
570 	.dev		= {
571 		.platform_data	= &ep93xx_keypad_data,
572 	},
573 	.num_resources	= ARRAY_SIZE(ep93xx_keypad_resource),
574 	.resource	= ep93xx_keypad_resource,
575 };
576 
577 /**
578  * ep93xx_register_keypad - Register the keypad platform device.
579  * @data:	platform specific keypad configuration (__initdata)
580  */
581 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data)
582 {
583 	ep93xx_keypad_data = *data;
584 	platform_device_register(&ep93xx_keypad_device);
585 }
586 
587 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev)
588 {
589 	int err;
590 	int i;
591 
592 	for (i = 0; i < 8; i++) {
593 		err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev));
594 		if (err)
595 			goto fail_gpio_c;
596 		err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev));
597 		if (err)
598 			goto fail_gpio_d;
599 	}
600 
601 	/* Enable the keypad controller; GPIO ports C and D used for keypad */
602 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS |
603 				 EP93XX_SYSCON_DEVCFG_GONK);
604 
605 	return 0;
606 
607 fail_gpio_d:
608 	gpio_free(EP93XX_GPIO_LINE_C(i));
609 fail_gpio_c:
610 	for (--i; i >= 0; --i) {
611 		gpio_free(EP93XX_GPIO_LINE_C(i));
612 		gpio_free(EP93XX_GPIO_LINE_D(i));
613 	}
614 	return err;
615 }
616 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio);
617 
618 void ep93xx_keypad_release_gpio(struct platform_device *pdev)
619 {
620 	int i;
621 
622 	for (i = 0; i < 8; i++) {
623 		gpio_free(EP93XX_GPIO_LINE_C(i));
624 		gpio_free(EP93XX_GPIO_LINE_D(i));
625 	}
626 
627 	/* Disable the keypad controller; GPIO ports C and D used for GPIO */
628 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
629 			       EP93XX_SYSCON_DEVCFG_GONK);
630 }
631 EXPORT_SYMBOL(ep93xx_keypad_release_gpio);
632 
633 /*************************************************************************
634  * EP93xx I2S audio peripheral handling
635  *************************************************************************/
636 static struct resource ep93xx_i2s_resource[] = {
637 	DEFINE_RES_MEM(EP93XX_I2S_PHYS_BASE, 0x100),
638 };
639 
640 static struct platform_device ep93xx_i2s_device = {
641 	.name		= "ep93xx-i2s",
642 	.id		= -1,
643 	.num_resources	= ARRAY_SIZE(ep93xx_i2s_resource),
644 	.resource	= ep93xx_i2s_resource,
645 };
646 
647 static struct platform_device ep93xx_pcm_device = {
648 	.name		= "ep93xx-pcm-audio",
649 	.id		= -1,
650 };
651 
652 void __init ep93xx_register_i2s(void)
653 {
654 	platform_device_register(&ep93xx_i2s_device);
655 	platform_device_register(&ep93xx_pcm_device);
656 }
657 
658 #define EP93XX_SYSCON_DEVCFG_I2S_MASK	(EP93XX_SYSCON_DEVCFG_I2SONSSP | \
659 					 EP93XX_SYSCON_DEVCFG_I2SONAC97)
660 
661 #define EP93XX_I2SCLKDIV_MASK		(EP93XX_SYSCON_I2SCLKDIV_ORIDE | \
662 					 EP93XX_SYSCON_I2SCLKDIV_SPOL)
663 
664 int ep93xx_i2s_acquire(void)
665 {
666 	unsigned val;
667 
668 	ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97,
669 			EP93XX_SYSCON_DEVCFG_I2S_MASK);
670 
671 	/*
672 	 * This is potentially racy with the clock api for i2s_mclk, sclk and
673 	 * lrclk. Since the i2s driver is the only user of those clocks we
674 	 * rely on it to prevent parallel use of this function and the
675 	 * clock api for the i2s clocks.
676 	 */
677 	val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV);
678 	val &= ~EP93XX_I2SCLKDIV_MASK;
679 	val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL;
680 	ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV);
681 
682 	return 0;
683 }
684 EXPORT_SYMBOL(ep93xx_i2s_acquire);
685 
686 void ep93xx_i2s_release(void)
687 {
688 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK);
689 }
690 EXPORT_SYMBOL(ep93xx_i2s_release);
691 
692 /*************************************************************************
693  * EP93xx AC97 audio peripheral handling
694  *************************************************************************/
695 static struct resource ep93xx_ac97_resources[] = {
696 	DEFINE_RES_MEM(EP93XX_AAC_PHYS_BASE, 0xac),
697 	DEFINE_RES_IRQ(IRQ_EP93XX_AACINTR),
698 };
699 
700 static struct platform_device ep93xx_ac97_device = {
701 	.name		= "ep93xx-ac97",
702 	.id		= -1,
703 	.num_resources	= ARRAY_SIZE(ep93xx_ac97_resources),
704 	.resource	= ep93xx_ac97_resources,
705 };
706 
707 void __init ep93xx_register_ac97(void)
708 {
709 	/*
710 	 * Make sure that the AC97 pins are not used by I2S.
711 	 */
712 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97);
713 
714 	platform_device_register(&ep93xx_ac97_device);
715 	platform_device_register(&ep93xx_pcm_device);
716 }
717 
718 /*************************************************************************
719  * EP93xx Watchdog
720  *************************************************************************/
721 static struct resource ep93xx_wdt_resources[] = {
722 	DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08),
723 };
724 
725 static struct platform_device ep93xx_wdt_device = {
726 	.name		= "ep93xx-wdt",
727 	.id		= -1,
728 	.num_resources	= ARRAY_SIZE(ep93xx_wdt_resources),
729 	.resource	= ep93xx_wdt_resources,
730 };
731 
732 /*************************************************************************
733  * EP93xx IDE
734  *************************************************************************/
735 static struct resource ep93xx_ide_resources[] = {
736 	DEFINE_RES_MEM(EP93XX_IDE_PHYS_BASE, 0x38),
737 	DEFINE_RES_IRQ(IRQ_EP93XX_EXT3),
738 };
739 
740 static struct platform_device ep93xx_ide_device = {
741 	.name		= "ep93xx-ide",
742 	.id		= -1,
743 	.dev		= {
744 		.dma_mask		= &ep93xx_ide_device.dev.coherent_dma_mask,
745 		.coherent_dma_mask	= DMA_BIT_MASK(32),
746 	},
747 	.num_resources	= ARRAY_SIZE(ep93xx_ide_resources),
748 	.resource	= ep93xx_ide_resources,
749 };
750 
751 void __init ep93xx_register_ide(void)
752 {
753 	platform_device_register(&ep93xx_ide_device);
754 }
755 
756 int ep93xx_ide_acquire_gpio(struct platform_device *pdev)
757 {
758 	int err;
759 	int i;
760 
761 	err = gpio_request(EP93XX_GPIO_LINE_EGPIO2, dev_name(&pdev->dev));
762 	if (err)
763 		return err;
764 	err = gpio_request(EP93XX_GPIO_LINE_EGPIO15, dev_name(&pdev->dev));
765 	if (err)
766 		goto fail_egpio15;
767 	for (i = 2; i < 8; i++) {
768 		err = gpio_request(EP93XX_GPIO_LINE_E(i), dev_name(&pdev->dev));
769 		if (err)
770 			goto fail_gpio_e;
771 	}
772 	for (i = 4; i < 8; i++) {
773 		err = gpio_request(EP93XX_GPIO_LINE_G(i), dev_name(&pdev->dev));
774 		if (err)
775 			goto fail_gpio_g;
776 	}
777 	for (i = 0; i < 8; i++) {
778 		err = gpio_request(EP93XX_GPIO_LINE_H(i), dev_name(&pdev->dev));
779 		if (err)
780 			goto fail_gpio_h;
781 	}
782 
783 	/* GPIO ports E[7:2], G[7:4] and H used by IDE */
784 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
785 				 EP93XX_SYSCON_DEVCFG_GONIDE |
786 				 EP93XX_SYSCON_DEVCFG_HONIDE);
787 	return 0;
788 
789 fail_gpio_h:
790 	for (--i; i >= 0; --i)
791 		gpio_free(EP93XX_GPIO_LINE_H(i));
792 	i = 8;
793 fail_gpio_g:
794 	for (--i; i >= 4; --i)
795 		gpio_free(EP93XX_GPIO_LINE_G(i));
796 	i = 8;
797 fail_gpio_e:
798 	for (--i; i >= 2; --i)
799 		gpio_free(EP93XX_GPIO_LINE_E(i));
800 	gpio_free(EP93XX_GPIO_LINE_EGPIO15);
801 fail_egpio15:
802 	gpio_free(EP93XX_GPIO_LINE_EGPIO2);
803 	return err;
804 }
805 EXPORT_SYMBOL(ep93xx_ide_acquire_gpio);
806 
807 void ep93xx_ide_release_gpio(struct platform_device *pdev)
808 {
809 	int i;
810 
811 	for (i = 2; i < 8; i++)
812 		gpio_free(EP93XX_GPIO_LINE_E(i));
813 	for (i = 4; i < 8; i++)
814 		gpio_free(EP93XX_GPIO_LINE_G(i));
815 	for (i = 0; i < 8; i++)
816 		gpio_free(EP93XX_GPIO_LINE_H(i));
817 	gpio_free(EP93XX_GPIO_LINE_EGPIO15);
818 	gpio_free(EP93XX_GPIO_LINE_EGPIO2);
819 
820 
821 	/* GPIO ports E[7:2], G[7:4] and H used by GPIO */
822 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_EONIDE |
823 			       EP93XX_SYSCON_DEVCFG_GONIDE |
824 			       EP93XX_SYSCON_DEVCFG_HONIDE);
825 }
826 EXPORT_SYMBOL(ep93xx_ide_release_gpio);
827 
828 /*************************************************************************
829  * EP93xx ADC
830  *************************************************************************/
831 static struct resource ep93xx_adc_resources[] = {
832 	DEFINE_RES_MEM(EP93XX_ADC_PHYS_BASE, 0x28),
833 	DEFINE_RES_IRQ(IRQ_EP93XX_TOUCH),
834 };
835 
836 static struct platform_device ep93xx_adc_device = {
837 	.name		= "ep93xx-adc",
838 	.id		= -1,
839 	.num_resources	= ARRAY_SIZE(ep93xx_adc_resources),
840 	.resource	= ep93xx_adc_resources,
841 };
842 
843 void __init ep93xx_register_adc(void)
844 {
845 	/* Power up ADC, deactivate Touch Screen Controller */
846 	ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_TIN,
847 				EP93XX_SYSCON_DEVCFG_ADCPD);
848 
849 	platform_device_register(&ep93xx_adc_device);
850 }
851 
852 /*************************************************************************
853  * EP93xx Security peripheral
854  *************************************************************************/
855 
856 /*
857  * The Maverick Key is 256 bits of micro fuses blown at the factory during
858  * manufacturing to uniquely identify a part.
859  *
860  * See: http://arm.cirrus.com/forum/viewtopic.php?t=486&highlight=maverick+key
861  */
862 #define EP93XX_SECURITY_REG(x)		(EP93XX_SECURITY_BASE + (x))
863 #define EP93XX_SECURITY_SECFLG		EP93XX_SECURITY_REG(0x2400)
864 #define EP93XX_SECURITY_FUSEFLG		EP93XX_SECURITY_REG(0x2410)
865 #define EP93XX_SECURITY_UNIQID		EP93XX_SECURITY_REG(0x2440)
866 #define EP93XX_SECURITY_UNIQCHK		EP93XX_SECURITY_REG(0x2450)
867 #define EP93XX_SECURITY_UNIQVAL		EP93XX_SECURITY_REG(0x2460)
868 #define EP93XX_SECURITY_SECID1		EP93XX_SECURITY_REG(0x2500)
869 #define EP93XX_SECURITY_SECID2		EP93XX_SECURITY_REG(0x2504)
870 #define EP93XX_SECURITY_SECCHK1		EP93XX_SECURITY_REG(0x2520)
871 #define EP93XX_SECURITY_SECCHK2		EP93XX_SECURITY_REG(0x2524)
872 #define EP93XX_SECURITY_UNIQID2		EP93XX_SECURITY_REG(0x2700)
873 #define EP93XX_SECURITY_UNIQID3		EP93XX_SECURITY_REG(0x2704)
874 #define EP93XX_SECURITY_UNIQID4		EP93XX_SECURITY_REG(0x2708)
875 #define EP93XX_SECURITY_UNIQID5		EP93XX_SECURITY_REG(0x270c)
876 
877 static char ep93xx_soc_id[33];
878 
879 static const char __init *ep93xx_get_soc_id(void)
880 {
881 	unsigned int id, id2, id3, id4, id5;
882 
883 	if (__raw_readl(EP93XX_SECURITY_UNIQVAL) != 1)
884 		return "bad Hamming code";
885 
886 	id = __raw_readl(EP93XX_SECURITY_UNIQID);
887 	id2 = __raw_readl(EP93XX_SECURITY_UNIQID2);
888 	id3 = __raw_readl(EP93XX_SECURITY_UNIQID3);
889 	id4 = __raw_readl(EP93XX_SECURITY_UNIQID4);
890 	id5 = __raw_readl(EP93XX_SECURITY_UNIQID5);
891 
892 	if (id != id2)
893 		return "invalid";
894 
895 	/* Toss the unique ID into the entropy pool */
896 	add_device_randomness(&id2, 4);
897 	add_device_randomness(&id3, 4);
898 	add_device_randomness(&id4, 4);
899 	add_device_randomness(&id5, 4);
900 
901 	snprintf(ep93xx_soc_id, sizeof(ep93xx_soc_id),
902 		 "%08x%08x%08x%08x", id2, id3, id4, id5);
903 
904 	return ep93xx_soc_id;
905 }
906 
907 static const char __init *ep93xx_get_soc_rev(void)
908 {
909 	int rev = ep93xx_chip_revision();
910 
911 	switch (rev) {
912 	case EP93XX_CHIP_REV_D0:
913 		return "D0";
914 	case EP93XX_CHIP_REV_D1:
915 		return "D1";
916 	case EP93XX_CHIP_REV_E0:
917 		return "E0";
918 	case EP93XX_CHIP_REV_E1:
919 		return "E1";
920 	case EP93XX_CHIP_REV_E2:
921 		return "E2";
922 	default:
923 		return "unknown";
924 	}
925 }
926 
927 static const char __init *ep93xx_get_machine_name(void)
928 {
929 	return kasprintf(GFP_KERNEL,"%s", machine_desc->name);
930 }
931 
932 static struct device __init *ep93xx_init_soc(void)
933 {
934 	struct soc_device_attribute *soc_dev_attr;
935 	struct soc_device *soc_dev;
936 
937 	soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
938 	if (!soc_dev_attr)
939 		return NULL;
940 
941 	soc_dev_attr->machine = ep93xx_get_machine_name();
942 	soc_dev_attr->family = "Cirrus Logic EP93xx";
943 	soc_dev_attr->revision = ep93xx_get_soc_rev();
944 	soc_dev_attr->soc_id = ep93xx_get_soc_id();
945 
946 	soc_dev = soc_device_register(soc_dev_attr);
947 	if (IS_ERR(soc_dev)) {
948 		kfree(soc_dev_attr->machine);
949 		kfree(soc_dev_attr);
950 		return NULL;
951 	}
952 
953 	return soc_device_to_device(soc_dev);
954 }
955 
956 struct device __init *ep93xx_init_devices(void)
957 {
958 	struct device *parent;
959 
960 	/* Disallow access to MaverickCrunch initially */
961 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA);
962 
963 	/* Default all ports to GPIO */
964 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS |
965 			       EP93XX_SYSCON_DEVCFG_GONK |
966 			       EP93XX_SYSCON_DEVCFG_EONIDE |
967 			       EP93XX_SYSCON_DEVCFG_GONIDE |
968 			       EP93XX_SYSCON_DEVCFG_HONIDE);
969 
970 	parent = ep93xx_init_soc();
971 
972 	/* Get the GPIO working early, other devices need it */
973 	platform_device_register(&ep93xx_gpio_device);
974 
975 	amba_device_register(&uart1_device, &iomem_resource);
976 	amba_device_register(&uart2_device, &iomem_resource);
977 	amba_device_register(&uart3_device, &iomem_resource);
978 
979 	platform_device_register(&ep93xx_rtc_device);
980 	platform_device_register(&ep93xx_ohci_device);
981 	platform_device_register(&ep93xx_wdt_device);
982 
983 	gpio_led_register_device(-1, &ep93xx_led_data);
984 
985 	return parent;
986 }
987 
988 void ep93xx_restart(enum reboot_mode mode, const char *cmd)
989 {
990 	/*
991 	 * Set then clear the SWRST bit to initiate a software reset
992 	 */
993 	ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST);
994 	ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST);
995 
996 	while (1)
997 		;
998 }
999 
1000 void __init ep93xx_init_late(void)
1001 {
1002 	crunch_init();
1003 }
1004