1 /* 2 * arch/arm/mach-ep93xx/core.c 3 * Core routines for Cirrus EP93xx chips. 4 * 5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> 6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> 7 * 8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key 9 * role in the ep93xx linux community. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 */ 16 17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt 18 19 #include <linux/kernel.h> 20 #include <linux/init.h> 21 #include <linux/platform_device.h> 22 #include <linux/interrupt.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/timex.h> 25 #include <linux/irq.h> 26 #include <linux/io.h> 27 #include <linux/gpio.h> 28 #include <linux/leds.h> 29 #include <linux/termios.h> 30 #include <linux/amba/bus.h> 31 #include <linux/amba/serial.h> 32 #include <linux/mtd/physmap.h> 33 #include <linux/i2c.h> 34 #include <linux/i2c-gpio.h> 35 #include <linux/spi/spi.h> 36 #include <linux/export.h> 37 38 #include <mach/hardware.h> 39 #include <mach/fb.h> 40 #include <mach/ep93xx_keypad.h> 41 #include <mach/ep93xx_spi.h> 42 #include <mach/gpio-ep93xx.h> 43 44 #include <asm/mach/map.h> 45 #include <asm/mach/time.h> 46 47 #include <asm/hardware/vic.h> 48 49 #include "soc.h" 50 51 /************************************************************************* 52 * Static I/O mappings that are needed for all EP93xx platforms 53 *************************************************************************/ 54 static struct map_desc ep93xx_io_desc[] __initdata = { 55 { 56 .virtual = EP93XX_AHB_VIRT_BASE, 57 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), 58 .length = EP93XX_AHB_SIZE, 59 .type = MT_DEVICE, 60 }, { 61 .virtual = EP93XX_APB_VIRT_BASE, 62 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), 63 .length = EP93XX_APB_SIZE, 64 .type = MT_DEVICE, 65 }, 66 }; 67 68 void __init ep93xx_map_io(void) 69 { 70 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); 71 } 72 73 74 /************************************************************************* 75 * Timer handling for EP93xx 76 ************************************************************************* 77 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and 78 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate 79 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz, 80 * is free-running, and can't generate interrupts. 81 * 82 * The 508 kHz timers are ideal for use for the timer interrupt, as the 83 * most common values of HZ divide 508 kHz nicely. We pick one of the 16 84 * bit timers (timer 1) since we don't need more than 16 bits of reload 85 * value as long as HZ >= 8. 86 * 87 * The higher clock rate of timer 4 makes it a better choice than the 88 * other timers for use in gettimeoffset(), while the fact that it can't 89 * generate interrupts means we don't have to worry about not being able 90 * to use this timer for something else. We also use timer 4 for keeping 91 * track of lost jiffies. 92 */ 93 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x)) 94 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00) 95 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04) 96 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08) 97 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7) 98 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6) 99 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3) 100 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c) 101 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20) 102 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24) 103 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28) 104 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c) 105 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60) 106 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64) 107 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8) 108 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80) 109 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84) 110 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88) 111 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c) 112 113 #define EP93XX_TIMER123_CLOCK 508469 114 #define EP93XX_TIMER4_CLOCK 983040 115 116 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1) 117 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ) 118 119 static unsigned int last_jiffy_time; 120 121 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id) 122 { 123 /* Writing any value clears the timer interrupt */ 124 __raw_writel(1, EP93XX_TIMER1_CLEAR); 125 126 /* Recover lost jiffies */ 127 while ((signed long) 128 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) 129 >= TIMER4_TICKS_PER_JIFFY) { 130 last_jiffy_time += TIMER4_TICKS_PER_JIFFY; 131 timer_tick(); 132 } 133 134 return IRQ_HANDLED; 135 } 136 137 static struct irqaction ep93xx_timer_irq = { 138 .name = "ep93xx timer", 139 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 140 .handler = ep93xx_timer_interrupt, 141 }; 142 143 static void __init ep93xx_timer_init(void) 144 { 145 u32 tmode = EP93XX_TIMER123_CONTROL_MODE | 146 EP93XX_TIMER123_CONTROL_CLKSEL; 147 148 /* Enable periodic HZ timer. */ 149 __raw_writel(tmode, EP93XX_TIMER1_CONTROL); 150 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD); 151 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE, 152 EP93XX_TIMER1_CONTROL); 153 154 /* Enable lost jiffy timer. */ 155 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE, 156 EP93XX_TIMER4_VALUE_HIGH); 157 158 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq); 159 } 160 161 static unsigned long ep93xx_gettimeoffset(void) 162 { 163 int offset; 164 165 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time; 166 167 /* Calculate (1000000 / 983040) * offset. */ 168 return offset + (53 * offset / 3072); 169 } 170 171 struct sys_timer ep93xx_timer = { 172 .init = ep93xx_timer_init, 173 .offset = ep93xx_gettimeoffset, 174 }; 175 176 177 /************************************************************************* 178 * EP93xx IRQ handling 179 *************************************************************************/ 180 void __init ep93xx_init_irq(void) 181 { 182 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0); 183 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0); 184 } 185 186 187 /************************************************************************* 188 * EP93xx System Controller Software Locked register handling 189 *************************************************************************/ 190 191 /* 192 * syscon_swlock prevents anything else from writing to the syscon 193 * block while a software locked register is being written. 194 */ 195 static DEFINE_SPINLOCK(syscon_swlock); 196 197 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) 198 { 199 unsigned long flags; 200 201 spin_lock_irqsave(&syscon_swlock, flags); 202 203 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 204 __raw_writel(val, reg); 205 206 spin_unlock_irqrestore(&syscon_swlock, flags); 207 } 208 209 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) 210 { 211 unsigned long flags; 212 unsigned int val; 213 214 spin_lock_irqsave(&syscon_swlock, flags); 215 216 val = __raw_readl(EP93XX_SYSCON_DEVCFG); 217 val &= ~clear_bits; 218 val |= set_bits; 219 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 220 __raw_writel(val, EP93XX_SYSCON_DEVCFG); 221 222 spin_unlock_irqrestore(&syscon_swlock, flags); 223 } 224 225 /** 226 * ep93xx_chip_revision() - returns the EP93xx chip revision 227 * 228 * See <mach/platform.h> for more information. 229 */ 230 unsigned int ep93xx_chip_revision(void) 231 { 232 unsigned int v; 233 234 v = __raw_readl(EP93XX_SYSCON_SYSCFG); 235 v &= EP93XX_SYSCON_SYSCFG_REV_MASK; 236 v >>= EP93XX_SYSCON_SYSCFG_REV_SHIFT; 237 return v; 238 } 239 240 /************************************************************************* 241 * EP93xx GPIO 242 *************************************************************************/ 243 static struct resource ep93xx_gpio_resource[] = { 244 { 245 .start = EP93XX_GPIO_PHYS_BASE, 246 .end = EP93XX_GPIO_PHYS_BASE + 0xcc - 1, 247 .flags = IORESOURCE_MEM, 248 }, 249 }; 250 251 static struct platform_device ep93xx_gpio_device = { 252 .name = "gpio-ep93xx", 253 .id = -1, 254 .num_resources = ARRAY_SIZE(ep93xx_gpio_resource), 255 .resource = ep93xx_gpio_resource, 256 }; 257 258 /************************************************************************* 259 * EP93xx peripheral handling 260 *************************************************************************/ 261 #define EP93XX_UART_MCR_OFFSET (0x0100) 262 263 static void ep93xx_uart_set_mctrl(struct amba_device *dev, 264 void __iomem *base, unsigned int mctrl) 265 { 266 unsigned int mcr; 267 268 mcr = 0; 269 if (mctrl & TIOCM_RTS) 270 mcr |= 2; 271 if (mctrl & TIOCM_DTR) 272 mcr |= 1; 273 274 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 275 } 276 277 static struct amba_pl010_data ep93xx_uart_data = { 278 .set_mctrl = ep93xx_uart_set_mctrl, 279 }; 280 281 static AMBA_APB_DEVICE(uart1, "apb:uart1", 0x00041010, EP93XX_UART1_PHYS_BASE, 282 { IRQ_EP93XX_UART1 }, &ep93xx_uart_data); 283 284 static AMBA_APB_DEVICE(uart2, "apb:uart2", 0x00041010, EP93XX_UART2_PHYS_BASE, 285 { IRQ_EP93XX_UART2 }, &ep93xx_uart_data); 286 287 static AMBA_APB_DEVICE(uart3, "apb:uart3", 0x00041010, EP93XX_UART3_PHYS_BASE, 288 { IRQ_EP93XX_UART3 }, &ep93xx_uart_data); 289 290 static struct resource ep93xx_rtc_resource[] = { 291 { 292 .start = EP93XX_RTC_PHYS_BASE, 293 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1, 294 .flags = IORESOURCE_MEM, 295 }, 296 }; 297 298 static struct platform_device ep93xx_rtc_device = { 299 .name = "ep93xx-rtc", 300 .id = -1, 301 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource), 302 .resource = ep93xx_rtc_resource, 303 }; 304 305 306 static struct resource ep93xx_ohci_resources[] = { 307 [0] = { 308 .start = EP93XX_USB_PHYS_BASE, 309 .end = EP93XX_USB_PHYS_BASE + 0x0fff, 310 .flags = IORESOURCE_MEM, 311 }, 312 [1] = { 313 .start = IRQ_EP93XX_USB, 314 .end = IRQ_EP93XX_USB, 315 .flags = IORESOURCE_IRQ, 316 }, 317 }; 318 319 320 static struct platform_device ep93xx_ohci_device = { 321 .name = "ep93xx-ohci", 322 .id = -1, 323 .dev = { 324 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask, 325 .coherent_dma_mask = DMA_BIT_MASK(32), 326 }, 327 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), 328 .resource = ep93xx_ohci_resources, 329 }; 330 331 332 /************************************************************************* 333 * EP93xx physmap'ed flash 334 *************************************************************************/ 335 static struct physmap_flash_data ep93xx_flash_data; 336 337 static struct resource ep93xx_flash_resource = { 338 .flags = IORESOURCE_MEM, 339 }; 340 341 static struct platform_device ep93xx_flash = { 342 .name = "physmap-flash", 343 .id = 0, 344 .dev = { 345 .platform_data = &ep93xx_flash_data, 346 }, 347 .num_resources = 1, 348 .resource = &ep93xx_flash_resource, 349 }; 350 351 /** 352 * ep93xx_register_flash() - Register the external flash device. 353 * @width: bank width in octets 354 * @start: resource start address 355 * @size: resource size 356 */ 357 void __init ep93xx_register_flash(unsigned int width, 358 resource_size_t start, resource_size_t size) 359 { 360 ep93xx_flash_data.width = width; 361 362 ep93xx_flash_resource.start = start; 363 ep93xx_flash_resource.end = start + size - 1; 364 365 platform_device_register(&ep93xx_flash); 366 } 367 368 369 /************************************************************************* 370 * EP93xx ethernet peripheral handling 371 *************************************************************************/ 372 static struct ep93xx_eth_data ep93xx_eth_data; 373 374 static struct resource ep93xx_eth_resource[] = { 375 { 376 .start = EP93XX_ETHERNET_PHYS_BASE, 377 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, 378 .flags = IORESOURCE_MEM, 379 }, { 380 .start = IRQ_EP93XX_ETHERNET, 381 .end = IRQ_EP93XX_ETHERNET, 382 .flags = IORESOURCE_IRQ, 383 } 384 }; 385 386 static u64 ep93xx_eth_dma_mask = DMA_BIT_MASK(32); 387 388 static struct platform_device ep93xx_eth_device = { 389 .name = "ep93xx-eth", 390 .id = -1, 391 .dev = { 392 .platform_data = &ep93xx_eth_data, 393 .coherent_dma_mask = DMA_BIT_MASK(32), 394 .dma_mask = &ep93xx_eth_dma_mask, 395 }, 396 .num_resources = ARRAY_SIZE(ep93xx_eth_resource), 397 .resource = ep93xx_eth_resource, 398 }; 399 400 /** 401 * ep93xx_register_eth - Register the built-in ethernet platform device. 402 * @data: platform specific ethernet configuration (__initdata) 403 * @copy_addr: flag indicating that the MAC address should be copied 404 * from the IndAd registers (as programmed by the bootloader) 405 */ 406 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) 407 { 408 if (copy_addr) 409 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6); 410 411 ep93xx_eth_data = *data; 412 platform_device_register(&ep93xx_eth_device); 413 } 414 415 416 /************************************************************************* 417 * EP93xx i2c peripheral handling 418 *************************************************************************/ 419 static struct i2c_gpio_platform_data ep93xx_i2c_data; 420 421 static struct platform_device ep93xx_i2c_device = { 422 .name = "i2c-gpio", 423 .id = 0, 424 .dev = { 425 .platform_data = &ep93xx_i2c_data, 426 }, 427 }; 428 429 /** 430 * ep93xx_register_i2c - Register the i2c platform device. 431 * @data: platform specific i2c-gpio configuration (__initdata) 432 * @devices: platform specific i2c bus device information (__initdata) 433 * @num: the number of devices on the i2c bus 434 */ 435 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, 436 struct i2c_board_info *devices, int num) 437 { 438 /* 439 * Set the EEPROM interface pin drive type control. 440 * Defines the driver type for the EECLK and EEDAT pins as either 441 * open drain, which will require an external pull-up, or a normal 442 * CMOS driver. 443 */ 444 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT) 445 pr_warning("sda != EEDAT, open drain has no effect\n"); 446 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK) 447 pr_warning("scl != EECLK, open drain has no effect\n"); 448 449 __raw_writel((data->sda_is_open_drain << 1) | 450 (data->scl_is_open_drain << 0), 451 EP93XX_GPIO_EEDRIVE); 452 453 ep93xx_i2c_data = *data; 454 i2c_register_board_info(0, devices, num); 455 platform_device_register(&ep93xx_i2c_device); 456 } 457 458 /************************************************************************* 459 * EP93xx SPI peripheral handling 460 *************************************************************************/ 461 static struct ep93xx_spi_info ep93xx_spi_master_data; 462 463 static struct resource ep93xx_spi_resources[] = { 464 { 465 .start = EP93XX_SPI_PHYS_BASE, 466 .end = EP93XX_SPI_PHYS_BASE + 0x18 - 1, 467 .flags = IORESOURCE_MEM, 468 }, 469 { 470 .start = IRQ_EP93XX_SSP, 471 .end = IRQ_EP93XX_SSP, 472 .flags = IORESOURCE_IRQ, 473 }, 474 }; 475 476 static u64 ep93xx_spi_dma_mask = DMA_BIT_MASK(32); 477 478 static struct platform_device ep93xx_spi_device = { 479 .name = "ep93xx-spi", 480 .id = 0, 481 .dev = { 482 .platform_data = &ep93xx_spi_master_data, 483 .coherent_dma_mask = DMA_BIT_MASK(32), 484 .dma_mask = &ep93xx_spi_dma_mask, 485 }, 486 .num_resources = ARRAY_SIZE(ep93xx_spi_resources), 487 .resource = ep93xx_spi_resources, 488 }; 489 490 /** 491 * ep93xx_register_spi() - registers spi platform device 492 * @info: ep93xx board specific spi master info (__initdata) 493 * @devices: SPI devices to register (__initdata) 494 * @num: number of SPI devices to register 495 * 496 * This function registers platform device for the EP93xx SPI controller and 497 * also makes sure that SPI pins are muxed so that I2S is not using those pins. 498 */ 499 void __init ep93xx_register_spi(struct ep93xx_spi_info *info, 500 struct spi_board_info *devices, int num) 501 { 502 /* 503 * When SPI is used, we need to make sure that I2S is muxed off from 504 * SPI pins. 505 */ 506 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONSSP); 507 508 ep93xx_spi_master_data = *info; 509 spi_register_board_info(devices, num); 510 platform_device_register(&ep93xx_spi_device); 511 } 512 513 /************************************************************************* 514 * EP93xx LEDs 515 *************************************************************************/ 516 static struct gpio_led ep93xx_led_pins[] = { 517 { 518 .name = "platform:grled", 519 .gpio = EP93XX_GPIO_LINE_GRLED, 520 }, { 521 .name = "platform:rdled", 522 .gpio = EP93XX_GPIO_LINE_RDLED, 523 }, 524 }; 525 526 static struct gpio_led_platform_data ep93xx_led_data = { 527 .num_leds = ARRAY_SIZE(ep93xx_led_pins), 528 .leds = ep93xx_led_pins, 529 }; 530 531 static struct platform_device ep93xx_leds = { 532 .name = "leds-gpio", 533 .id = -1, 534 .dev = { 535 .platform_data = &ep93xx_led_data, 536 }, 537 }; 538 539 540 /************************************************************************* 541 * EP93xx pwm peripheral handling 542 *************************************************************************/ 543 static struct resource ep93xx_pwm0_resource[] = { 544 { 545 .start = EP93XX_PWM_PHYS_BASE, 546 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1, 547 .flags = IORESOURCE_MEM, 548 }, 549 }; 550 551 static struct platform_device ep93xx_pwm0_device = { 552 .name = "ep93xx-pwm", 553 .id = 0, 554 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource), 555 .resource = ep93xx_pwm0_resource, 556 }; 557 558 static struct resource ep93xx_pwm1_resource[] = { 559 { 560 .start = EP93XX_PWM_PHYS_BASE + 0x20, 561 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1, 562 .flags = IORESOURCE_MEM, 563 }, 564 }; 565 566 static struct platform_device ep93xx_pwm1_device = { 567 .name = "ep93xx-pwm", 568 .id = 1, 569 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource), 570 .resource = ep93xx_pwm1_resource, 571 }; 572 573 void __init ep93xx_register_pwm(int pwm0, int pwm1) 574 { 575 if (pwm0) 576 platform_device_register(&ep93xx_pwm0_device); 577 578 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */ 579 if (pwm1) 580 platform_device_register(&ep93xx_pwm1_device); 581 } 582 583 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) 584 { 585 int err; 586 587 if (pdev->id == 0) { 588 err = 0; 589 } else if (pdev->id == 1) { 590 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14, 591 dev_name(&pdev->dev)); 592 if (err) 593 return err; 594 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0); 595 if (err) 596 goto fail; 597 598 /* PWM 1 output on EGPIO[14] */ 599 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG); 600 } else { 601 err = -ENODEV; 602 } 603 604 return err; 605 606 fail: 607 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 608 return err; 609 } 610 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio); 611 612 void ep93xx_pwm_release_gpio(struct platform_device *pdev) 613 { 614 if (pdev->id == 1) { 615 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14); 616 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 617 618 /* EGPIO[14] used for GPIO */ 619 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG); 620 } 621 } 622 EXPORT_SYMBOL(ep93xx_pwm_release_gpio); 623 624 625 /************************************************************************* 626 * EP93xx video peripheral handling 627 *************************************************************************/ 628 static struct ep93xxfb_mach_info ep93xxfb_data; 629 630 static struct resource ep93xx_fb_resource[] = { 631 { 632 .start = EP93XX_RASTER_PHYS_BASE, 633 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1, 634 .flags = IORESOURCE_MEM, 635 }, 636 }; 637 638 static struct platform_device ep93xx_fb_device = { 639 .name = "ep93xx-fb", 640 .id = -1, 641 .dev = { 642 .platform_data = &ep93xxfb_data, 643 .coherent_dma_mask = DMA_BIT_MASK(32), 644 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, 645 }, 646 .num_resources = ARRAY_SIZE(ep93xx_fb_resource), 647 .resource = ep93xx_fb_resource, 648 }; 649 650 /* The backlight use a single register in the framebuffer's register space */ 651 #define EP93XX_RASTER_REG_BRIGHTNESS 0x20 652 653 static struct resource ep93xx_bl_resources[] = { 654 DEFINE_RES_MEM(EP93XX_RASTER_PHYS_BASE + 655 EP93XX_RASTER_REG_BRIGHTNESS, 0x04), 656 }; 657 658 static struct platform_device ep93xx_bl_device = { 659 .name = "ep93xx-bl", 660 .id = -1, 661 .num_resources = ARRAY_SIZE(ep93xx_bl_resources), 662 .resource = ep93xx_bl_resources, 663 }; 664 665 /** 666 * ep93xx_register_fb - Register the framebuffer platform device. 667 * @data: platform specific framebuffer configuration (__initdata) 668 */ 669 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) 670 { 671 ep93xxfb_data = *data; 672 platform_device_register(&ep93xx_fb_device); 673 platform_device_register(&ep93xx_bl_device); 674 } 675 676 677 /************************************************************************* 678 * EP93xx matrix keypad peripheral handling 679 *************************************************************************/ 680 static struct ep93xx_keypad_platform_data ep93xx_keypad_data; 681 682 static struct resource ep93xx_keypad_resource[] = { 683 { 684 .start = EP93XX_KEY_MATRIX_PHYS_BASE, 685 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1, 686 .flags = IORESOURCE_MEM, 687 }, { 688 .start = IRQ_EP93XX_KEY, 689 .end = IRQ_EP93XX_KEY, 690 .flags = IORESOURCE_IRQ, 691 }, 692 }; 693 694 static struct platform_device ep93xx_keypad_device = { 695 .name = "ep93xx-keypad", 696 .id = -1, 697 .dev = { 698 .platform_data = &ep93xx_keypad_data, 699 }, 700 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), 701 .resource = ep93xx_keypad_resource, 702 }; 703 704 /** 705 * ep93xx_register_keypad - Register the keypad platform device. 706 * @data: platform specific keypad configuration (__initdata) 707 */ 708 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) 709 { 710 ep93xx_keypad_data = *data; 711 platform_device_register(&ep93xx_keypad_device); 712 } 713 714 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) 715 { 716 int err; 717 int i; 718 719 for (i = 0; i < 8; i++) { 720 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); 721 if (err) 722 goto fail_gpio_c; 723 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); 724 if (err) 725 goto fail_gpio_d; 726 } 727 728 /* Enable the keypad controller; GPIO ports C and D used for keypad */ 729 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | 730 EP93XX_SYSCON_DEVCFG_GONK); 731 732 return 0; 733 734 fail_gpio_d: 735 gpio_free(EP93XX_GPIO_LINE_C(i)); 736 fail_gpio_c: 737 for ( ; i >= 0; --i) { 738 gpio_free(EP93XX_GPIO_LINE_C(i)); 739 gpio_free(EP93XX_GPIO_LINE_D(i)); 740 } 741 return err; 742 } 743 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); 744 745 void ep93xx_keypad_release_gpio(struct platform_device *pdev) 746 { 747 int i; 748 749 for (i = 0; i < 8; i++) { 750 gpio_free(EP93XX_GPIO_LINE_C(i)); 751 gpio_free(EP93XX_GPIO_LINE_D(i)); 752 } 753 754 /* Disable the keypad controller; GPIO ports C and D used for GPIO */ 755 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 756 EP93XX_SYSCON_DEVCFG_GONK); 757 } 758 EXPORT_SYMBOL(ep93xx_keypad_release_gpio); 759 760 /************************************************************************* 761 * EP93xx I2S audio peripheral handling 762 *************************************************************************/ 763 static struct resource ep93xx_i2s_resource[] = { 764 { 765 .start = EP93XX_I2S_PHYS_BASE, 766 .end = EP93XX_I2S_PHYS_BASE + 0x100 - 1, 767 .flags = IORESOURCE_MEM, 768 }, 769 }; 770 771 static struct platform_device ep93xx_i2s_device = { 772 .name = "ep93xx-i2s", 773 .id = -1, 774 .num_resources = ARRAY_SIZE(ep93xx_i2s_resource), 775 .resource = ep93xx_i2s_resource, 776 }; 777 778 static struct platform_device ep93xx_pcm_device = { 779 .name = "ep93xx-pcm-audio", 780 .id = -1, 781 }; 782 783 void __init ep93xx_register_i2s(void) 784 { 785 platform_device_register(&ep93xx_i2s_device); 786 platform_device_register(&ep93xx_pcm_device); 787 } 788 789 #define EP93XX_SYSCON_DEVCFG_I2S_MASK (EP93XX_SYSCON_DEVCFG_I2SONSSP | \ 790 EP93XX_SYSCON_DEVCFG_I2SONAC97) 791 792 #define EP93XX_I2SCLKDIV_MASK (EP93XX_SYSCON_I2SCLKDIV_ORIDE | \ 793 EP93XX_SYSCON_I2SCLKDIV_SPOL) 794 795 int ep93xx_i2s_acquire(void) 796 { 797 unsigned val; 798 799 ep93xx_devcfg_set_clear(EP93XX_SYSCON_DEVCFG_I2SONAC97, 800 EP93XX_SYSCON_DEVCFG_I2S_MASK); 801 802 /* 803 * This is potentially racy with the clock api for i2s_mclk, sclk and 804 * lrclk. Since the i2s driver is the only user of those clocks we 805 * rely on it to prevent parallel use of this function and the 806 * clock api for the i2s clocks. 807 */ 808 val = __raw_readl(EP93XX_SYSCON_I2SCLKDIV); 809 val &= ~EP93XX_I2SCLKDIV_MASK; 810 val |= EP93XX_SYSCON_I2SCLKDIV_ORIDE | EP93XX_SYSCON_I2SCLKDIV_SPOL; 811 ep93xx_syscon_swlocked_write(val, EP93XX_SYSCON_I2SCLKDIV); 812 813 return 0; 814 } 815 EXPORT_SYMBOL(ep93xx_i2s_acquire); 816 817 void ep93xx_i2s_release(void) 818 { 819 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2S_MASK); 820 } 821 EXPORT_SYMBOL(ep93xx_i2s_release); 822 823 /************************************************************************* 824 * EP93xx AC97 audio peripheral handling 825 *************************************************************************/ 826 static struct resource ep93xx_ac97_resources[] = { 827 { 828 .start = EP93XX_AAC_PHYS_BASE, 829 .end = EP93XX_AAC_PHYS_BASE + 0xac - 1, 830 .flags = IORESOURCE_MEM, 831 }, 832 { 833 .start = IRQ_EP93XX_AACINTR, 834 .end = IRQ_EP93XX_AACINTR, 835 .flags = IORESOURCE_IRQ, 836 }, 837 }; 838 839 static struct platform_device ep93xx_ac97_device = { 840 .name = "ep93xx-ac97", 841 .id = -1, 842 .num_resources = ARRAY_SIZE(ep93xx_ac97_resources), 843 .resource = ep93xx_ac97_resources, 844 }; 845 846 void __init ep93xx_register_ac97(void) 847 { 848 /* 849 * Make sure that the AC97 pins are not used by I2S. 850 */ 851 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_I2SONAC97); 852 853 platform_device_register(&ep93xx_ac97_device); 854 platform_device_register(&ep93xx_pcm_device); 855 } 856 857 /************************************************************************* 858 * EP93xx Watchdog 859 *************************************************************************/ 860 static struct resource ep93xx_wdt_resources[] = { 861 DEFINE_RES_MEM(EP93XX_WATCHDOG_PHYS_BASE, 0x08), 862 }; 863 864 static struct platform_device ep93xx_wdt_device = { 865 .name = "ep93xx-wdt", 866 .id = -1, 867 .num_resources = ARRAY_SIZE(ep93xx_wdt_resources), 868 .resource = ep93xx_wdt_resources, 869 }; 870 871 void __init ep93xx_init_devices(void) 872 { 873 /* Disallow access to MaverickCrunch initially */ 874 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA); 875 876 /* Default all ports to GPIO */ 877 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 878 EP93XX_SYSCON_DEVCFG_GONK | 879 EP93XX_SYSCON_DEVCFG_EONIDE | 880 EP93XX_SYSCON_DEVCFG_GONIDE | 881 EP93XX_SYSCON_DEVCFG_HONIDE); 882 883 /* Get the GPIO working early, other devices need it */ 884 platform_device_register(&ep93xx_gpio_device); 885 886 amba_device_register(&uart1_device, &iomem_resource); 887 amba_device_register(&uart2_device, &iomem_resource); 888 amba_device_register(&uart3_device, &iomem_resource); 889 890 platform_device_register(&ep93xx_rtc_device); 891 platform_device_register(&ep93xx_ohci_device); 892 platform_device_register(&ep93xx_leds); 893 platform_device_register(&ep93xx_wdt_device); 894 } 895 896 void ep93xx_restart(char mode, const char *cmd) 897 { 898 /* 899 * Set then clear the SWRST bit to initiate a software reset 900 */ 901 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_SWRST); 902 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_SWRST); 903 904 while (1) 905 ; 906 } 907