1 /* 2 * arch/arm/mach-ep93xx/core.c 3 * Core routines for Cirrus EP93xx chips. 4 * 5 * Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org> 6 * Copyright (C) 2007 Herbert Valerio Riedel <hvr@gnu.org> 7 * 8 * Thanks go to Michael Burian and Ray Lehtiniemi for their key 9 * role in the ep93xx linux community. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2 of the License, or (at 14 * your option) any later version. 15 */ 16 17 #define pr_fmt(fmt) "ep93xx " KBUILD_MODNAME ": " fmt 18 19 #include <linux/kernel.h> 20 #include <linux/init.h> 21 #include <linux/platform_device.h> 22 #include <linux/interrupt.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/timex.h> 25 #include <linux/irq.h> 26 #include <linux/io.h> 27 #include <linux/gpio.h> 28 #include <linux/leds.h> 29 #include <linux/termios.h> 30 #include <linux/amba/bus.h> 31 #include <linux/amba/serial.h> 32 #include <linux/i2c.h> 33 #include <linux/i2c-gpio.h> 34 35 #include <mach/hardware.h> 36 #include <mach/fb.h> 37 #include <mach/ep93xx_keypad.h> 38 39 #include <asm/mach/map.h> 40 #include <asm/mach/time.h> 41 42 #include <asm/hardware/vic.h> 43 44 45 /************************************************************************* 46 * Static I/O mappings that are needed for all EP93xx platforms 47 *************************************************************************/ 48 static struct map_desc ep93xx_io_desc[] __initdata = { 49 { 50 .virtual = EP93XX_AHB_VIRT_BASE, 51 .pfn = __phys_to_pfn(EP93XX_AHB_PHYS_BASE), 52 .length = EP93XX_AHB_SIZE, 53 .type = MT_DEVICE, 54 }, { 55 .virtual = EP93XX_APB_VIRT_BASE, 56 .pfn = __phys_to_pfn(EP93XX_APB_PHYS_BASE), 57 .length = EP93XX_APB_SIZE, 58 .type = MT_DEVICE, 59 }, 60 }; 61 62 void __init ep93xx_map_io(void) 63 { 64 iotable_init(ep93xx_io_desc, ARRAY_SIZE(ep93xx_io_desc)); 65 } 66 67 68 /************************************************************************* 69 * Timer handling for EP93xx 70 ************************************************************************* 71 * The ep93xx has four internal timers. Timers 1, 2 (both 16 bit) and 72 * 3 (32 bit) count down at 508 kHz, are self-reloading, and can generate 73 * an interrupt on underflow. Timer 4 (40 bit) counts down at 983.04 kHz, 74 * is free-running, and can't generate interrupts. 75 * 76 * The 508 kHz timers are ideal for use for the timer interrupt, as the 77 * most common values of HZ divide 508 kHz nicely. We pick one of the 16 78 * bit timers (timer 1) since we don't need more than 16 bits of reload 79 * value as long as HZ >= 8. 80 * 81 * The higher clock rate of timer 4 makes it a better choice than the 82 * other timers for use in gettimeoffset(), while the fact that it can't 83 * generate interrupts means we don't have to worry about not being able 84 * to use this timer for something else. We also use timer 4 for keeping 85 * track of lost jiffies. 86 */ 87 #define EP93XX_TIMER_REG(x) (EP93XX_TIMER_BASE + (x)) 88 #define EP93XX_TIMER1_LOAD EP93XX_TIMER_REG(0x00) 89 #define EP93XX_TIMER1_VALUE EP93XX_TIMER_REG(0x04) 90 #define EP93XX_TIMER1_CONTROL EP93XX_TIMER_REG(0x08) 91 #define EP93XX_TIMER123_CONTROL_ENABLE (1 << 7) 92 #define EP93XX_TIMER123_CONTROL_MODE (1 << 6) 93 #define EP93XX_TIMER123_CONTROL_CLKSEL (1 << 3) 94 #define EP93XX_TIMER1_CLEAR EP93XX_TIMER_REG(0x0c) 95 #define EP93XX_TIMER2_LOAD EP93XX_TIMER_REG(0x20) 96 #define EP93XX_TIMER2_VALUE EP93XX_TIMER_REG(0x24) 97 #define EP93XX_TIMER2_CONTROL EP93XX_TIMER_REG(0x28) 98 #define EP93XX_TIMER2_CLEAR EP93XX_TIMER_REG(0x2c) 99 #define EP93XX_TIMER4_VALUE_LOW EP93XX_TIMER_REG(0x60) 100 #define EP93XX_TIMER4_VALUE_HIGH EP93XX_TIMER_REG(0x64) 101 #define EP93XX_TIMER4_VALUE_HIGH_ENABLE (1 << 8) 102 #define EP93XX_TIMER3_LOAD EP93XX_TIMER_REG(0x80) 103 #define EP93XX_TIMER3_VALUE EP93XX_TIMER_REG(0x84) 104 #define EP93XX_TIMER3_CONTROL EP93XX_TIMER_REG(0x88) 105 #define EP93XX_TIMER3_CLEAR EP93XX_TIMER_REG(0x8c) 106 107 #define EP93XX_TIMER123_CLOCK 508469 108 #define EP93XX_TIMER4_CLOCK 983040 109 110 #define TIMER1_RELOAD ((EP93XX_TIMER123_CLOCK / HZ) - 1) 111 #define TIMER4_TICKS_PER_JIFFY DIV_ROUND_CLOSEST(CLOCK_TICK_RATE, HZ) 112 113 static unsigned int last_jiffy_time; 114 115 static irqreturn_t ep93xx_timer_interrupt(int irq, void *dev_id) 116 { 117 /* Writing any value clears the timer interrupt */ 118 __raw_writel(1, EP93XX_TIMER1_CLEAR); 119 120 /* Recover lost jiffies */ 121 while ((signed long) 122 (__raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time) 123 >= TIMER4_TICKS_PER_JIFFY) { 124 last_jiffy_time += TIMER4_TICKS_PER_JIFFY; 125 timer_tick(); 126 } 127 128 return IRQ_HANDLED; 129 } 130 131 static struct irqaction ep93xx_timer_irq = { 132 .name = "ep93xx timer", 133 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 134 .handler = ep93xx_timer_interrupt, 135 }; 136 137 static void __init ep93xx_timer_init(void) 138 { 139 u32 tmode = EP93XX_TIMER123_CONTROL_MODE | 140 EP93XX_TIMER123_CONTROL_CLKSEL; 141 142 /* Enable periodic HZ timer. */ 143 __raw_writel(tmode, EP93XX_TIMER1_CONTROL); 144 __raw_writel(TIMER1_RELOAD, EP93XX_TIMER1_LOAD); 145 __raw_writel(tmode | EP93XX_TIMER123_CONTROL_ENABLE, 146 EP93XX_TIMER1_CONTROL); 147 148 /* Enable lost jiffy timer. */ 149 __raw_writel(EP93XX_TIMER4_VALUE_HIGH_ENABLE, 150 EP93XX_TIMER4_VALUE_HIGH); 151 152 setup_irq(IRQ_EP93XX_TIMER1, &ep93xx_timer_irq); 153 } 154 155 static unsigned long ep93xx_gettimeoffset(void) 156 { 157 int offset; 158 159 offset = __raw_readl(EP93XX_TIMER4_VALUE_LOW) - last_jiffy_time; 160 161 /* Calculate (1000000 / 983040) * offset. */ 162 return offset + (53 * offset / 3072); 163 } 164 165 struct sys_timer ep93xx_timer = { 166 .init = ep93xx_timer_init, 167 .offset = ep93xx_gettimeoffset, 168 }; 169 170 171 /************************************************************************* 172 * EP93xx IRQ handling 173 *************************************************************************/ 174 extern void ep93xx_gpio_init_irq(void); 175 176 void __init ep93xx_init_irq(void) 177 { 178 vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0); 179 vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0); 180 181 ep93xx_gpio_init_irq(); 182 } 183 184 185 /************************************************************************* 186 * EP93xx System Controller Software Locked register handling 187 *************************************************************************/ 188 189 /* 190 * syscon_swlock prevents anything else from writing to the syscon 191 * block while a software locked register is being written. 192 */ 193 static DEFINE_SPINLOCK(syscon_swlock); 194 195 void ep93xx_syscon_swlocked_write(unsigned int val, void __iomem *reg) 196 { 197 unsigned long flags; 198 199 spin_lock_irqsave(&syscon_swlock, flags); 200 201 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 202 __raw_writel(val, reg); 203 204 spin_unlock_irqrestore(&syscon_swlock, flags); 205 } 206 EXPORT_SYMBOL(ep93xx_syscon_swlocked_write); 207 208 void ep93xx_devcfg_set_clear(unsigned int set_bits, unsigned int clear_bits) 209 { 210 unsigned long flags; 211 unsigned int val; 212 213 spin_lock_irqsave(&syscon_swlock, flags); 214 215 val = __raw_readl(EP93XX_SYSCON_DEVCFG); 216 val |= set_bits; 217 val &= ~clear_bits; 218 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 219 __raw_writel(val, EP93XX_SYSCON_DEVCFG); 220 221 spin_unlock_irqrestore(&syscon_swlock, flags); 222 } 223 EXPORT_SYMBOL(ep93xx_devcfg_set_clear); 224 225 226 /************************************************************************* 227 * EP93xx peripheral handling 228 *************************************************************************/ 229 #define EP93XX_UART_MCR_OFFSET (0x0100) 230 231 static void ep93xx_uart_set_mctrl(struct amba_device *dev, 232 void __iomem *base, unsigned int mctrl) 233 { 234 unsigned int mcr; 235 236 mcr = 0; 237 if (!(mctrl & TIOCM_RTS)) 238 mcr |= 2; 239 if (!(mctrl & TIOCM_DTR)) 240 mcr |= 1; 241 242 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET); 243 } 244 245 static struct amba_pl010_data ep93xx_uart_data = { 246 .set_mctrl = ep93xx_uart_set_mctrl, 247 }; 248 249 static struct amba_device uart1_device = { 250 .dev = { 251 .init_name = "apb:uart1", 252 .platform_data = &ep93xx_uart_data, 253 }, 254 .res = { 255 .start = EP93XX_UART1_PHYS_BASE, 256 .end = EP93XX_UART1_PHYS_BASE + 0x0fff, 257 .flags = IORESOURCE_MEM, 258 }, 259 .irq = { IRQ_EP93XX_UART1, NO_IRQ }, 260 .periphid = 0x00041010, 261 }; 262 263 static struct amba_device uart2_device = { 264 .dev = { 265 .init_name = "apb:uart2", 266 .platform_data = &ep93xx_uart_data, 267 }, 268 .res = { 269 .start = EP93XX_UART2_PHYS_BASE, 270 .end = EP93XX_UART2_PHYS_BASE + 0x0fff, 271 .flags = IORESOURCE_MEM, 272 }, 273 .irq = { IRQ_EP93XX_UART2, NO_IRQ }, 274 .periphid = 0x00041010, 275 }; 276 277 static struct amba_device uart3_device = { 278 .dev = { 279 .init_name = "apb:uart3", 280 .platform_data = &ep93xx_uart_data, 281 }, 282 .res = { 283 .start = EP93XX_UART3_PHYS_BASE, 284 .end = EP93XX_UART3_PHYS_BASE + 0x0fff, 285 .flags = IORESOURCE_MEM, 286 }, 287 .irq = { IRQ_EP93XX_UART3, NO_IRQ }, 288 .periphid = 0x00041010, 289 }; 290 291 292 static struct resource ep93xx_rtc_resource[] = { 293 { 294 .start = EP93XX_RTC_PHYS_BASE, 295 .end = EP93XX_RTC_PHYS_BASE + 0x10c - 1, 296 .flags = IORESOURCE_MEM, 297 }, 298 }; 299 300 static struct platform_device ep93xx_rtc_device = { 301 .name = "ep93xx-rtc", 302 .id = -1, 303 .num_resources = ARRAY_SIZE(ep93xx_rtc_resource), 304 .resource = ep93xx_rtc_resource, 305 }; 306 307 308 static struct resource ep93xx_ohci_resources[] = { 309 [0] = { 310 .start = EP93XX_USB_PHYS_BASE, 311 .end = EP93XX_USB_PHYS_BASE + 0x0fff, 312 .flags = IORESOURCE_MEM, 313 }, 314 [1] = { 315 .start = IRQ_EP93XX_USB, 316 .end = IRQ_EP93XX_USB, 317 .flags = IORESOURCE_IRQ, 318 }, 319 }; 320 321 322 static struct platform_device ep93xx_ohci_device = { 323 .name = "ep93xx-ohci", 324 .id = -1, 325 .dev = { 326 .dma_mask = &ep93xx_ohci_device.dev.coherent_dma_mask, 327 .coherent_dma_mask = DMA_BIT_MASK(32), 328 }, 329 .num_resources = ARRAY_SIZE(ep93xx_ohci_resources), 330 .resource = ep93xx_ohci_resources, 331 }; 332 333 static struct ep93xx_eth_data ep93xx_eth_data; 334 335 static struct resource ep93xx_eth_resource[] = { 336 { 337 .start = EP93XX_ETHERNET_PHYS_BASE, 338 .end = EP93XX_ETHERNET_PHYS_BASE + 0xffff, 339 .flags = IORESOURCE_MEM, 340 }, { 341 .start = IRQ_EP93XX_ETHERNET, 342 .end = IRQ_EP93XX_ETHERNET, 343 .flags = IORESOURCE_IRQ, 344 } 345 }; 346 347 static struct platform_device ep93xx_eth_device = { 348 .name = "ep93xx-eth", 349 .id = -1, 350 .dev = { 351 .platform_data = &ep93xx_eth_data, 352 }, 353 .num_resources = ARRAY_SIZE(ep93xx_eth_resource), 354 .resource = ep93xx_eth_resource, 355 }; 356 357 void __init ep93xx_register_eth(struct ep93xx_eth_data *data, int copy_addr) 358 { 359 if (copy_addr) 360 memcpy_fromio(data->dev_addr, EP93XX_ETHERNET_BASE + 0x50, 6); 361 362 ep93xx_eth_data = *data; 363 platform_device_register(&ep93xx_eth_device); 364 } 365 366 367 /************************************************************************* 368 * EP93xx i2c peripheral handling 369 *************************************************************************/ 370 static struct i2c_gpio_platform_data ep93xx_i2c_data; 371 372 static struct platform_device ep93xx_i2c_device = { 373 .name = "i2c-gpio", 374 .id = 0, 375 .dev.platform_data = &ep93xx_i2c_data, 376 }; 377 378 void __init ep93xx_register_i2c(struct i2c_gpio_platform_data *data, 379 struct i2c_board_info *devices, int num) 380 { 381 /* 382 * Set the EEPROM interface pin drive type control. 383 * Defines the driver type for the EECLK and EEDAT pins as either 384 * open drain, which will require an external pull-up, or a normal 385 * CMOS driver. 386 */ 387 if (data->sda_is_open_drain && data->sda_pin != EP93XX_GPIO_LINE_EEDAT) 388 pr_warning("sda != EEDAT, open drain has no effect\n"); 389 if (data->scl_is_open_drain && data->scl_pin != EP93XX_GPIO_LINE_EECLK) 390 pr_warning("scl != EECLK, open drain has no effect\n"); 391 392 __raw_writel((data->sda_is_open_drain << 1) | 393 (data->scl_is_open_drain << 0), 394 EP93XX_GPIO_EEDRIVE); 395 396 ep93xx_i2c_data = *data; 397 i2c_register_board_info(0, devices, num); 398 platform_device_register(&ep93xx_i2c_device); 399 } 400 401 402 /************************************************************************* 403 * EP93xx LEDs 404 *************************************************************************/ 405 static struct gpio_led ep93xx_led_pins[] = { 406 { 407 .name = "platform:grled", 408 .gpio = EP93XX_GPIO_LINE_GRLED, 409 }, { 410 .name = "platform:rdled", 411 .gpio = EP93XX_GPIO_LINE_RDLED, 412 }, 413 }; 414 415 static struct gpio_led_platform_data ep93xx_led_data = { 416 .num_leds = ARRAY_SIZE(ep93xx_led_pins), 417 .leds = ep93xx_led_pins, 418 }; 419 420 static struct platform_device ep93xx_leds = { 421 .name = "leds-gpio", 422 .id = -1, 423 .dev = { 424 .platform_data = &ep93xx_led_data, 425 }, 426 }; 427 428 429 /************************************************************************* 430 * EP93xx pwm peripheral handling 431 *************************************************************************/ 432 static struct resource ep93xx_pwm0_resource[] = { 433 { 434 .start = EP93XX_PWM_PHYS_BASE, 435 .end = EP93XX_PWM_PHYS_BASE + 0x10 - 1, 436 .flags = IORESOURCE_MEM, 437 }, 438 }; 439 440 static struct platform_device ep93xx_pwm0_device = { 441 .name = "ep93xx-pwm", 442 .id = 0, 443 .num_resources = ARRAY_SIZE(ep93xx_pwm0_resource), 444 .resource = ep93xx_pwm0_resource, 445 }; 446 447 static struct resource ep93xx_pwm1_resource[] = { 448 { 449 .start = EP93XX_PWM_PHYS_BASE + 0x20, 450 .end = EP93XX_PWM_PHYS_BASE + 0x30 - 1, 451 .flags = IORESOURCE_MEM, 452 }, 453 }; 454 455 static struct platform_device ep93xx_pwm1_device = { 456 .name = "ep93xx-pwm", 457 .id = 1, 458 .num_resources = ARRAY_SIZE(ep93xx_pwm1_resource), 459 .resource = ep93xx_pwm1_resource, 460 }; 461 462 void __init ep93xx_register_pwm(int pwm0, int pwm1) 463 { 464 if (pwm0) 465 platform_device_register(&ep93xx_pwm0_device); 466 467 /* NOTE: EP9307 does not have PWMOUT1 (pin EGPIO14) */ 468 if (pwm1) 469 platform_device_register(&ep93xx_pwm1_device); 470 } 471 472 int ep93xx_pwm_acquire_gpio(struct platform_device *pdev) 473 { 474 int err; 475 476 if (pdev->id == 0) { 477 err = 0; 478 } else if (pdev->id == 1) { 479 err = gpio_request(EP93XX_GPIO_LINE_EGPIO14, 480 dev_name(&pdev->dev)); 481 if (err) 482 return err; 483 err = gpio_direction_output(EP93XX_GPIO_LINE_EGPIO14, 0); 484 if (err) 485 goto fail; 486 487 /* PWM 1 output on EGPIO[14] */ 488 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_PONG); 489 } else { 490 err = -ENODEV; 491 } 492 493 return err; 494 495 fail: 496 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 497 return err; 498 } 499 EXPORT_SYMBOL(ep93xx_pwm_acquire_gpio); 500 501 void ep93xx_pwm_release_gpio(struct platform_device *pdev) 502 { 503 if (pdev->id == 1) { 504 gpio_direction_input(EP93XX_GPIO_LINE_EGPIO14); 505 gpio_free(EP93XX_GPIO_LINE_EGPIO14); 506 507 /* EGPIO[14] used for GPIO */ 508 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_PONG); 509 } 510 } 511 EXPORT_SYMBOL(ep93xx_pwm_release_gpio); 512 513 514 /************************************************************************* 515 * EP93xx video peripheral handling 516 *************************************************************************/ 517 static struct ep93xxfb_mach_info ep93xxfb_data; 518 519 static struct resource ep93xx_fb_resource[] = { 520 { 521 .start = EP93XX_RASTER_PHYS_BASE, 522 .end = EP93XX_RASTER_PHYS_BASE + 0x800 - 1, 523 .flags = IORESOURCE_MEM, 524 }, 525 }; 526 527 static struct platform_device ep93xx_fb_device = { 528 .name = "ep93xx-fb", 529 .id = -1, 530 .dev = { 531 .platform_data = &ep93xxfb_data, 532 .coherent_dma_mask = DMA_BIT_MASK(32), 533 .dma_mask = &ep93xx_fb_device.dev.coherent_dma_mask, 534 }, 535 .num_resources = ARRAY_SIZE(ep93xx_fb_resource), 536 .resource = ep93xx_fb_resource, 537 }; 538 539 void __init ep93xx_register_fb(struct ep93xxfb_mach_info *data) 540 { 541 ep93xxfb_data = *data; 542 platform_device_register(&ep93xx_fb_device); 543 } 544 545 546 /************************************************************************* 547 * EP93xx matrix keypad peripheral handling 548 *************************************************************************/ 549 static struct resource ep93xx_keypad_resource[] = { 550 { 551 .start = EP93XX_KEY_MATRIX_PHYS_BASE, 552 .end = EP93XX_KEY_MATRIX_PHYS_BASE + 0x0c - 1, 553 .flags = IORESOURCE_MEM, 554 }, { 555 .start = IRQ_EP93XX_KEY, 556 .end = IRQ_EP93XX_KEY, 557 .flags = IORESOURCE_IRQ, 558 }, 559 }; 560 561 static struct platform_device ep93xx_keypad_device = { 562 .name = "ep93xx-keypad", 563 .id = -1, 564 .num_resources = ARRAY_SIZE(ep93xx_keypad_resource), 565 .resource = ep93xx_keypad_resource, 566 }; 567 568 void __init ep93xx_register_keypad(struct ep93xx_keypad_platform_data *data) 569 { 570 ep93xx_keypad_device.dev.platform_data = data; 571 platform_device_register(&ep93xx_keypad_device); 572 } 573 574 int ep93xx_keypad_acquire_gpio(struct platform_device *pdev) 575 { 576 int err; 577 int i; 578 579 for (i = 0; i < 8; i++) { 580 err = gpio_request(EP93XX_GPIO_LINE_C(i), dev_name(&pdev->dev)); 581 if (err) 582 goto fail_gpio_c; 583 err = gpio_request(EP93XX_GPIO_LINE_D(i), dev_name(&pdev->dev)); 584 if (err) 585 goto fail_gpio_d; 586 } 587 588 /* Enable the keypad controller; GPIO ports C and D used for keypad */ 589 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_KEYS | 590 EP93XX_SYSCON_DEVCFG_GONK); 591 592 return 0; 593 594 fail_gpio_d: 595 gpio_free(EP93XX_GPIO_LINE_C(i)); 596 fail_gpio_c: 597 for ( ; i >= 0; --i) { 598 gpio_free(EP93XX_GPIO_LINE_C(i)); 599 gpio_free(EP93XX_GPIO_LINE_D(i)); 600 } 601 return err; 602 } 603 EXPORT_SYMBOL(ep93xx_keypad_acquire_gpio); 604 605 void ep93xx_keypad_release_gpio(struct platform_device *pdev) 606 { 607 int i; 608 609 for (i = 0; i < 8; i++) { 610 gpio_free(EP93XX_GPIO_LINE_C(i)); 611 gpio_free(EP93XX_GPIO_LINE_D(i)); 612 } 613 614 /* Disable the keypad controller; GPIO ports C and D used for GPIO */ 615 ep93xx_devcfg_set_bits(EP93XX_SYSCON_DEVCFG_KEYS | 616 EP93XX_SYSCON_DEVCFG_GONK); 617 } 618 EXPORT_SYMBOL(ep93xx_keypad_release_gpio); 619 620 621 extern void ep93xx_gpio_init(void); 622 623 void __init ep93xx_init_devices(void) 624 { 625 /* Disallow access to MaverickCrunch initially */ 626 ep93xx_devcfg_clear_bits(EP93XX_SYSCON_DEVCFG_CPENA); 627 628 ep93xx_gpio_init(); 629 630 amba_device_register(&uart1_device, &iomem_resource); 631 amba_device_register(&uart2_device, &iomem_resource); 632 amba_device_register(&uart3_device, &iomem_resource); 633 634 platform_device_register(&ep93xx_rtc_device); 635 platform_device_register(&ep93xx_ohci_device); 636 platform_device_register(&ep93xx_leds); 637 } 638