1 /* 2 * Utility to set the DAVINCI MUX register from a table in mux.h 3 * 4 * Author: Vladimir Barinov, MontaVista Software, Inc. <source@mvista.com> 5 * 6 * Based on linux/arch/arm/plat-omap/mux.c: 7 * Copyright (C) 2003 - 2005 Nokia Corporation 8 * 9 * Written by Tony Lindgren 10 * 11 * 2007 (c) MontaVista Software, Inc. This file is licensed under 12 * the terms of the GNU General Public License version 2. This program 13 * is licensed "as is" without any warranty of any kind, whether express 14 * or implied. 15 * 16 * Copyright (C) 2008 Texas Instruments. 17 */ 18 19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 20 21 #include <linux/io.h> 22 #include <linux/module.h> 23 #include <linux/spinlock.h> 24 25 #include "mux.h" 26 #include "common.h" 27 28 static void __iomem *pinmux_base; 29 30 /* 31 * Sets the DAVINCI MUX register based on the table 32 */ 33 int davinci_cfg_reg(const unsigned long index) 34 { 35 static DEFINE_SPINLOCK(mux_spin_lock); 36 struct davinci_soc_info *soc_info = &davinci_soc_info; 37 unsigned long flags; 38 const struct mux_config *cfg; 39 unsigned int reg_orig = 0, reg = 0; 40 unsigned int mask, warn = 0; 41 42 if (WARN_ON(!soc_info->pinmux_pins)) 43 return -ENODEV; 44 45 if (!pinmux_base) { 46 pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K); 47 if (WARN_ON(!pinmux_base)) 48 return -ENOMEM; 49 } 50 51 if (index >= soc_info->pinmux_pins_num) { 52 pr_err("Invalid pin mux index: %lu (%lu)\n", 53 index, soc_info->pinmux_pins_num); 54 dump_stack(); 55 return -ENODEV; 56 } 57 58 cfg = &soc_info->pinmux_pins[index]; 59 60 if (cfg->name == NULL) { 61 pr_err("No entry for the specified index\n"); 62 return -ENODEV; 63 } 64 65 /* Update the mux register in question */ 66 if (cfg->mask) { 67 unsigned tmp1, tmp2; 68 69 spin_lock_irqsave(&mux_spin_lock, flags); 70 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg); 71 72 mask = (cfg->mask << cfg->mask_offset); 73 tmp1 = reg_orig & mask; 74 reg = reg_orig & ~mask; 75 76 tmp2 = (cfg->mode << cfg->mask_offset); 77 reg |= tmp2; 78 79 if (tmp1 != tmp2) 80 warn = 1; 81 82 __raw_writel(reg, pinmux_base + cfg->mux_reg); 83 spin_unlock_irqrestore(&mux_spin_lock, flags); 84 } 85 86 if (warn) { 87 #ifdef CONFIG_DAVINCI_MUX_WARNINGS 88 pr_warn("initialized %s\n", cfg->name); 89 #endif 90 } 91 92 #ifdef CONFIG_DAVINCI_MUX_DEBUG 93 if (cfg->debug || warn) { 94 pr_warn("Setting register %s\n", cfg->name); 95 pr_warn(" %s (0x%08x) = 0x%08x -> 0x%08x\n", 96 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg); 97 } 98 #endif 99 100 return 0; 101 } 102 EXPORT_SYMBOL(davinci_cfg_reg); 103 104 int davinci_cfg_reg_list(const short pins[]) 105 { 106 int i, error = -EINVAL; 107 108 if (pins) 109 for (i = 0; pins[i] >= 0; i++) { 110 error = davinci_cfg_reg(pins[i]); 111 if (error) 112 break; 113 } 114 115 return error; 116 } 117