10fdebc5eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2ca31807bSArnd Bergmann /* 3ca31807bSArnd Bergmann * Chip specific defines for DA8XX/OMAP L1XX SoC 4ca31807bSArnd Bergmann * 5ca31807bSArnd Bergmann * Author: Mark A. Greer <mgreer@mvista.com> 6ca31807bSArnd Bergmann * 70fdebc5eSThomas Gleixner * 2007, 2009-2010 (c) MontaVista Software, Inc. 8ca31807bSArnd Bergmann */ 9ca31807bSArnd Bergmann #ifndef __ASM_ARCH_DAVINCI_DA8XX_H 10ca31807bSArnd Bergmann #define __ASM_ARCH_DAVINCI_DA8XX_H 11ca31807bSArnd Bergmann 12*dec85a95SArnd Bergmann #include <linux/dma-mapping.h> 13ca31807bSArnd Bergmann #include <linux/platform_device.h> 14*dec85a95SArnd Bergmann #include <linux/videodev2.h> 15ca31807bSArnd Bergmann #include <linux/reboot.h> 16ca31807bSArnd Bergmann #include <linux/regmap.h> 17ca31807bSArnd Bergmann 18*dec85a95SArnd Bergmann #include "hardware.h" 19ca31807bSArnd Bergmann #include "pm.h" 20ca31807bSArnd Bergmann 21ca31807bSArnd Bergmann #include <media/davinci/vpif_types.h> 22ca31807bSArnd Bergmann 23ca31807bSArnd Bergmann extern void __iomem *da8xx_syscfg0_base; 24ca31807bSArnd Bergmann extern void __iomem *da8xx_syscfg1_base; 25ca31807bSArnd Bergmann 26ca31807bSArnd Bergmann /* 27ca31807bSArnd Bergmann * The cp_intc interrupt controller for the da8xx isn't in the same 28ca31807bSArnd Bergmann * chunk of physical memory space as the other registers (like it is 29ca31807bSArnd Bergmann * on the davincis) so it needs to be mapped separately. It will be 30ca31807bSArnd Bergmann * mapped early on when the I/O space is mapped and we'll put it just 31ca31807bSArnd Bergmann * before the I/O space in the processor's virtual memory space. 32ca31807bSArnd Bergmann */ 33ca31807bSArnd Bergmann #define DA8XX_CP_INTC_BASE 0xfffee000 34ca31807bSArnd Bergmann #define DA8XX_CP_INTC_SIZE SZ_8K 35ca31807bSArnd Bergmann #define DA8XX_CP_INTC_VIRT (IO_VIRT - DA8XX_CP_INTC_SIZE - SZ_4K) 36ca31807bSArnd Bergmann 37ca31807bSArnd Bergmann #define DA8XX_SYSCFG0_BASE (IO_PHYS + 0x14000) 38ca31807bSArnd Bergmann #define DA8XX_SYSCFG0_VIRT(x) (da8xx_syscfg0_base + (x)) 39ca31807bSArnd Bergmann #define DA8XX_JTAG_ID_REG 0x18 40ca31807bSArnd Bergmann #define DA8XX_HOST1CFG_REG 0x44 41ca31807bSArnd Bergmann #define DA8XX_CHIPSIG_REG 0x174 42ca31807bSArnd Bergmann #define DA8XX_CFGCHIP0_REG 0x17c 43ca31807bSArnd Bergmann #define DA8XX_CFGCHIP1_REG 0x180 44ca31807bSArnd Bergmann #define DA8XX_CFGCHIP2_REG 0x184 45ca31807bSArnd Bergmann #define DA8XX_CFGCHIP3_REG 0x188 46ca31807bSArnd Bergmann #define DA8XX_CFGCHIP4_REG 0x18c 47ca31807bSArnd Bergmann 48ca31807bSArnd Bergmann #define DA8XX_SYSCFG1_BASE (IO_PHYS + 0x22C000) 49ca31807bSArnd Bergmann #define DA8XX_SYSCFG1_VIRT(x) (da8xx_syscfg1_base + (x)) 50ca31807bSArnd Bergmann #define DA8XX_DEEPSLEEP_REG 0x8 51ca31807bSArnd Bergmann #define DA8XX_PWRDN_REG 0x18 52ca31807bSArnd Bergmann 53ca31807bSArnd Bergmann #define DA8XX_PSC0_BASE 0x01c10000 54ca31807bSArnd Bergmann #define DA8XX_PLL0_BASE 0x01c11000 55ca31807bSArnd Bergmann #define DA8XX_TIMER64P0_BASE 0x01c20000 56ca31807bSArnd Bergmann #define DA8XX_TIMER64P1_BASE 0x01c21000 57ca31807bSArnd Bergmann #define DA8XX_VPIF_BASE 0x01e17000 58ca31807bSArnd Bergmann #define DA8XX_GPIO_BASE 0x01e26000 59ca31807bSArnd Bergmann #define DA8XX_PSC1_BASE 0x01e27000 60ca31807bSArnd Bergmann 61ca31807bSArnd Bergmann #define DA8XX_DSP_L2_RAM_BASE 0x11800000 62ca31807bSArnd Bergmann #define DA8XX_DSP_L1P_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x600000) 63ca31807bSArnd Bergmann #define DA8XX_DSP_L1D_RAM_BASE (DA8XX_DSP_L2_RAM_BASE + 0x700000) 64ca31807bSArnd Bergmann 65ca31807bSArnd Bergmann #define DA8XX_AEMIF_CS2_BASE 0x60000000 66ca31807bSArnd Bergmann #define DA8XX_AEMIF_CS3_BASE 0x62000000 67ca31807bSArnd Bergmann #define DA8XX_AEMIF_CTL_BASE 0x68000000 68ca31807bSArnd Bergmann #define DA8XX_SHARED_RAM_BASE 0x80000000 69ca31807bSArnd Bergmann #define DA8XX_ARM_RAM_BASE 0xffff0000 70ca31807bSArnd Bergmann 71ca31807bSArnd Bergmann void da830_init(void); 72ca31807bSArnd Bergmann 73ca31807bSArnd Bergmann void da850_init(void); 74ca31807bSArnd Bergmann 75ca31807bSArnd Bergmann int da850_register_vpif_display 76ca31807bSArnd Bergmann (struct vpif_display_config *display_config); 77ca31807bSArnd Bergmann int da850_register_vpif_capture 78ca31807bSArnd Bergmann (struct vpif_capture_config *capture_config); 79ca31807bSArnd Bergmann struct regmap *da8xx_get_cfgchip(void); 80*dec85a95SArnd Bergmann void __iomem *da8xx_get_mem_ctlr(void); 81ca31807bSArnd Bergmann 82ca31807bSArnd Bergmann #endif /* __ASM_ARCH_DAVINCI_DA8XX_H */ 83