1if ARCH_CLPS711X 2 3menu "CLPS711X/EP721X/EP731X Implementations" 4 5config ARCH_AUTCPU12 6 bool "AUTCPU12" 7 help 8 Say Y if you intend to run the kernel on the autronix autcpu12 9 board. This board is based on a Cirrus Logic CS89712. 10 11config ARCH_CDB89712 12 bool "CDB89712" 13 select ISA 14 help 15 This is an evaluation board from Cirrus for the CS89712 processor. 16 The board includes 2 serial ports, Ethernet, IRDA, and expansion 17 headers. It comes with 16 MB SDRAM and 8 MB flash ROM. 18 19config ARCH_CEIVA 20 bool "CEIVA" 21 help 22 Say Y here if you intend to run this kernel on the Ceiva/Polaroid 23 PhotoMax Digital Picture Frame. 24 25config ARCH_CLEP7312 26 bool "CLEP7312" 27 help 28 Boards based on the Cirrus Logic 7212/7312 chips. 29 30config ARCH_EDB7211 31 bool "EDB7211" 32 select ISA 33 select ARCH_SPARSEMEM_ENABLE 34 select ARCH_SELECT_MEMORY_MODEL 35 help 36 Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 37 evaluation board. 38 39config ARCH_P720T 40 bool "P720T" 41 help 42 Say Y here if you intend to run this kernel on the ARM Prospector 43 720T. 44 45config ARCH_FORTUNET 46 bool "FORTUNET" 47 48config EP72XX_ROM_BOOT 49 bool "EP721x/EP731x ROM boot" 50 help 51 If you say Y here, your CLPS711x-based kernel will use the bootstrap 52 mode memory map instead of the normal memory map. 53 54 Processors derived from the Cirrus CLPS711X core support two boot 55 modes. Normal mode boots from the external memory device at CS0. 56 Bootstrap mode rearranges parts of the memory map, placing an 57 internal 128 byte bootstrap ROM at CS0. This option performs the 58 address map changes required to support booting in this mode. 59 60 You almost surely want to say N here. 61 62endmenu 63 64endif 65