1if ARCH_CLPS711X 2 3menu "CLPS711X/EP721X Implementations" 4 5config ARCH_AUTCPU12 6 bool "AUTCPU12" 7 help 8 Say Y if you intend to run the kernel on the autronix autcpu12 9 board. This board is based on a Cirrus Logic CS89712. 10 11config ARCH_CDB89712 12 bool "CDB89712" 13 select ISA 14 help 15 This is an evaluation board from Cirrus for the CS89712 processor. 16 The board includes 2 serial ports, Ethernet, IRDA, and expansion 17 headers. It comes with 16 MB SDRAM and 8 MB flash ROM. 18 19config ARCH_CEIVA 20 bool "CEIVA" 21 help 22 Say Y here if you intend to run this kernel on the Ceiva/Polaroid 23 PhotoMax Digital Picture Frame. 24 25config ARCH_CLEP7312 26 bool "CLEP7312" 27 help 28 Boards based on the Cirrus Logic 7212/7312 chips. 29 30config ARCH_EDB7211 31 bool "EDB7211" 32 select ISA 33 select ARCH_DISCONTIGMEM_ENABLE 34 help 35 Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211 36 evaluation board. 37 38config ARCH_P720T 39 bool "P720T" 40 help 41 Say Y here if you intend to run this kernel on the ARM Prospector 42 720T. 43 44config ARCH_FORTUNET 45 bool "FORTUNET" 46 47# XXX Maybe these should indicate register compatibility 48# instead of being mutually exclusive. 49config ARCH_EP7211 50 bool 51 depends on ARCH_EDB7211 52 default y 53 54config ARCH_EP7212 55 bool 56 depends on ARCH_P720T || ARCH_CEIVA 57 default y 58 59config EP72XX_ROM_BOOT 60 bool "EP72xx ROM boot" 61 depends on ARCH_EP7211 || ARCH_EP7212 62 ---help--- 63 If you say Y here, your CLPS711x-based kernel will use the bootstrap 64 mode memory map instead of the normal memory map. 65 66 Processors derived from the Cirrus CLPS-711X core support two boot 67 modes. Normal mode boots from the external memory device at CS0. 68 Bootstrap mode rearranges parts of the memory map, placing an 69 internal 128 byte bootstrap ROM at CS0. This option performs the 70 address map changes required to support booting in this mode. 71 72 You almost surely want to say N here. 73 74endmenu 75 76endif 77