1 /* 2 * Copyright (C) 2010 Broadcom 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/delay.h> 16 #include <linux/init.h> 17 #include <linux/irqchip.h> 18 #include <linux/of_address.h> 19 #include <linux/of_platform.h> 20 #include <linux/clk/bcm2835.h> 21 22 #include <asm/mach/arch.h> 23 #include <asm/mach/map.h> 24 25 #define PM_RSTC 0x1c 26 #define PM_RSTS 0x20 27 #define PM_WDOG 0x24 28 29 #define PM_PASSWORD 0x5a000000 30 #define PM_RSTC_WRCFG_MASK 0x00000030 31 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 32 #define PM_RSTS_HADWRH_SET 0x00000040 33 34 static void __iomem *wdt_regs; 35 36 /* 37 * The machine restart method can be called from an atomic context so we won't 38 * be able to ioremap the regs then. 39 */ 40 static void bcm2835_setup_restart(void) 41 { 42 struct device_node *np = of_find_compatible_node(NULL, NULL, 43 "brcm,bcm2835-pm-wdt"); 44 if (WARN(!np, "unable to setup watchdog restart")) 45 return; 46 47 wdt_regs = of_iomap(np, 0); 48 WARN(!wdt_regs, "failed to remap watchdog regs"); 49 } 50 51 static void bcm2835_restart(enum reboot_mode mode, const char *cmd) 52 { 53 u32 val; 54 55 if (!wdt_regs) 56 return; 57 58 /* use a timeout of 10 ticks (~150us) */ 59 writel_relaxed(10 | PM_PASSWORD, wdt_regs + PM_WDOG); 60 val = readl_relaxed(wdt_regs + PM_RSTC); 61 val &= ~PM_RSTC_WRCFG_MASK; 62 val |= PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET; 63 writel_relaxed(val, wdt_regs + PM_RSTC); 64 65 /* No sleeping, possibly atomic. */ 66 mdelay(1); 67 } 68 69 /* 70 * We can't really power off, but if we do the normal reset scheme, and 71 * indicate to bootcode.bin not to reboot, then most of the chip will be 72 * powered off. 73 */ 74 static void bcm2835_power_off(void) 75 { 76 u32 val; 77 78 /* 79 * We set the watchdog hard reset bit here to distinguish this reset 80 * from the normal (full) reset. bootcode.bin will not reboot after a 81 * hard reset. 82 */ 83 val = readl_relaxed(wdt_regs + PM_RSTS); 84 val &= ~PM_RSTC_WRCFG_MASK; 85 val |= PM_PASSWORD | PM_RSTS_HADWRH_SET; 86 writel_relaxed(val, wdt_regs + PM_RSTS); 87 88 /* Continue with normal reset mechanism */ 89 bcm2835_restart(REBOOT_HARD, ""); 90 } 91 92 static void __init bcm2835_init(void) 93 { 94 int ret; 95 96 bcm2835_setup_restart(); 97 if (wdt_regs) 98 pm_power_off = bcm2835_power_off; 99 100 bcm2835_init_clocks(); 101 102 ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, 103 NULL); 104 if (ret) { 105 pr_err("of_platform_populate failed: %d\n", ret); 106 BUG(); 107 } 108 } 109 110 static const char * const bcm2835_compat[] = { 111 "brcm,bcm2835", 112 NULL 113 }; 114 115 DT_MACHINE_START(BCM2835, "BCM2835") 116 .init_irq = irqchip_init, 117 .init_machine = bcm2835_init, 118 .restart = bcm2835_restart, 119 .dt_compat = bcm2835_compat 120 MACHINE_END 121