1cac01723SNicolas Ferre /* 2cac01723SNicolas Ferre * Setup code for SAMA5 3cac01723SNicolas Ferre * 4cac01723SNicolas Ferre * Copyright (C) 2013 Atmel, 5cac01723SNicolas Ferre * 2013 Ludovic Desroches <ludovic.desroches@atmel.com> 6cac01723SNicolas Ferre * 7cac01723SNicolas Ferre * Licensed under GPLv2 or later. 8cac01723SNicolas Ferre */ 9cac01723SNicolas Ferre 10cac01723SNicolas Ferre #include <linux/types.h> 11cac01723SNicolas Ferre #include <linux/init.h> 12cac01723SNicolas Ferre #include <linux/module.h> 13cac01723SNicolas Ferre #include <linux/gpio.h> 14cac01723SNicolas Ferre #include <linux/micrel_phy.h> 15cac01723SNicolas Ferre #include <linux/of.h> 16cac01723SNicolas Ferre #include <linux/of_irq.h> 17cac01723SNicolas Ferre #include <linux/of_platform.h> 18cac01723SNicolas Ferre #include <linux/phy.h> 19cac01723SNicolas Ferre #include <linux/clk-provider.h> 20cac01723SNicolas Ferre #include <linux/phy.h> 21cac01723SNicolas Ferre 22cac01723SNicolas Ferre #include <mach/hardware.h> 23cac01723SNicolas Ferre 24cac01723SNicolas Ferre #include <asm/setup.h> 25cac01723SNicolas Ferre #include <asm/irq.h> 26cac01723SNicolas Ferre #include <asm/mach/arch.h> 27cac01723SNicolas Ferre #include <asm/mach/map.h> 28cac01723SNicolas Ferre #include <asm/mach/irq.h> 29cac01723SNicolas Ferre 30cac01723SNicolas Ferre #include "generic.h" 31cac01723SNicolas Ferre 32cac01723SNicolas Ferre static int ksz8081_phy_fixup(struct phy_device *phy) 33cac01723SNicolas Ferre { 34cac01723SNicolas Ferre int value; 35cac01723SNicolas Ferre 36cac01723SNicolas Ferre value = phy_read(phy, 0x16); 37cac01723SNicolas Ferre value &= ~0x20; 38cac01723SNicolas Ferre phy_write(phy, 0x16, value); 39cac01723SNicolas Ferre 40cac01723SNicolas Ferre return 0; 41cac01723SNicolas Ferre } 42cac01723SNicolas Ferre 43cac01723SNicolas Ferre static void __init sama5_dt_device_init(void) 44cac01723SNicolas Ferre { 45cac01723SNicolas Ferre if (of_machine_is_compatible("atmel,sama5d4ek") && 46cac01723SNicolas Ferre IS_ENABLED(CONFIG_PHYLIB)) { 47cac01723SNicolas Ferre phy_register_fixup_for_id("fc028000.etherne:00", 48cac01723SNicolas Ferre ksz8081_phy_fixup); 49cac01723SNicolas Ferre } 50cac01723SNicolas Ferre 51cac01723SNicolas Ferre of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 52cac01723SNicolas Ferre at91_sam9x5_pm_init(); 53cac01723SNicolas Ferre } 54cac01723SNicolas Ferre 55cac01723SNicolas Ferre static const char *sama5_dt_board_compat[] __initconst = { 56cac01723SNicolas Ferre "atmel,sama5", 57cac01723SNicolas Ferre NULL 58cac01723SNicolas Ferre }; 59cac01723SNicolas Ferre 60cac01723SNicolas Ferre DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") 61cac01723SNicolas Ferre /* Maintainer: Atmel */ 62cac01723SNicolas Ferre .map_io = at91_map_io, 63cac01723SNicolas Ferre .init_early = at91_dt_initialize, 64cac01723SNicolas Ferre .init_machine = sama5_dt_device_init, 65cac01723SNicolas Ferre .dt_compat = sama5_dt_board_compat, 66cac01723SNicolas Ferre MACHINE_END 67cac01723SNicolas Ferre 68cac01723SNicolas Ferre static struct map_desc at91_io_desc[] __initdata = { 69cac01723SNicolas Ferre { 70cac01723SNicolas Ferre .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_MPDDRC), 71cac01723SNicolas Ferre .pfn = __phys_to_pfn(SAMA5D4_BASE_MPDDRC), 72cac01723SNicolas Ferre .length = SZ_512, 73cac01723SNicolas Ferre .type = MT_DEVICE, 74cac01723SNicolas Ferre }, 75cac01723SNicolas Ferre { 76cac01723SNicolas Ferre .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_PMC), 77cac01723SNicolas Ferre .pfn = __phys_to_pfn(SAMA5D4_BASE_PMC), 78cac01723SNicolas Ferre .length = SZ_512, 79cac01723SNicolas Ferre .type = MT_DEVICE, 80cac01723SNicolas Ferre }, 81cac01723SNicolas Ferre { /* On sama5d4, we use USART3 as serial console */ 82cac01723SNicolas Ferre .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_USART3), 83cac01723SNicolas Ferre .pfn = __phys_to_pfn(SAMA5D4_BASE_USART3), 84cac01723SNicolas Ferre .length = SZ_256, 85cac01723SNicolas Ferre .type = MT_DEVICE, 86cac01723SNicolas Ferre }, 87cac01723SNicolas Ferre { /* A bunch of peripheral with fine grained IO space */ 88cac01723SNicolas Ferre .virtual = (unsigned long)AT91_ALT_IO_P2V(SAMA5D4_BASE_SYS2), 89cac01723SNicolas Ferre .pfn = __phys_to_pfn(SAMA5D4_BASE_SYS2), 90cac01723SNicolas Ferre .length = SZ_2K, 91cac01723SNicolas Ferre .type = MT_DEVICE, 92cac01723SNicolas Ferre }, 93cac01723SNicolas Ferre }; 94cac01723SNicolas Ferre 95cac01723SNicolas Ferre static void __init sama5_alt_map_io(void) 96cac01723SNicolas Ferre { 97cac01723SNicolas Ferre at91_alt_map_io(); 98cac01723SNicolas Ferre iotable_init(at91_io_desc, ARRAY_SIZE(at91_io_desc)); 99cac01723SNicolas Ferre } 100cac01723SNicolas Ferre 101cac01723SNicolas Ferre static const char *sama5_alt_dt_board_compat[] __initconst = { 102cac01723SNicolas Ferre "atmel,sama5d4", 103cac01723SNicolas Ferre NULL 104cac01723SNicolas Ferre }; 105cac01723SNicolas Ferre 106cac01723SNicolas Ferre DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5 (Device Tree)") 107cac01723SNicolas Ferre /* Maintainer: Atmel */ 108cac01723SNicolas Ferre .map_io = sama5_alt_map_io, 109cac01723SNicolas Ferre .init_early = at91_dt_initialize, 110cac01723SNicolas Ferre .init_machine = sama5_dt_device_init, 111cac01723SNicolas Ferre .dt_compat = sama5_alt_dt_board_compat, 112cac01723SNicolas Ferre .l2c_aux_mask = ~0UL, 113cac01723SNicolas Ferre MACHINE_END 114