1 /* 2 * arch/arm/mach-at91/pm.c 3 * AT91 Power Management 4 * 5 * Copyright (C) 2005 David Brownell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 13 #include <linux/gpio.h> 14 #include <linux/suspend.h> 15 #include <linux/sched.h> 16 #include <linux/proc_fs.h> 17 #include <linux/genalloc.h> 18 #include <linux/interrupt.h> 19 #include <linux/sysfs.h> 20 #include <linux/module.h> 21 #include <linux/of.h> 22 #include <linux/of_platform.h> 23 #include <linux/of_address.h> 24 #include <linux/platform_device.h> 25 #include <linux/io.h> 26 #include <linux/clk/at91_pmc.h> 27 28 #include <asm/irq.h> 29 #include <linux/atomic.h> 30 #include <asm/mach/time.h> 31 #include <asm/mach/irq.h> 32 #include <asm/fncpy.h> 33 #include <asm/cacheflush.h> 34 35 #include <mach/cpu.h> 36 #include <mach/hardware.h> 37 38 #include "generic.h" 39 #include "pm.h" 40 41 static struct { 42 unsigned long uhp_udp_mask; 43 int memctrl; 44 } at91_pm_data; 45 46 void __iomem *at91_ramc_base[2]; 47 48 static int at91_pm_valid_state(suspend_state_t state) 49 { 50 switch (state) { 51 case PM_SUSPEND_ON: 52 case PM_SUSPEND_STANDBY: 53 case PM_SUSPEND_MEM: 54 return 1; 55 56 default: 57 return 0; 58 } 59 } 60 61 62 static suspend_state_t target_state; 63 64 /* 65 * Called after processes are frozen, but before we shutdown devices. 66 */ 67 static int at91_pm_begin(suspend_state_t state) 68 { 69 target_state = state; 70 return 0; 71 } 72 73 /* 74 * Verify that all the clocks are correct before entering 75 * slow-clock mode. 76 */ 77 static int at91_pm_verify_clocks(void) 78 { 79 unsigned long scsr; 80 int i; 81 82 scsr = at91_pmc_read(AT91_PMC_SCSR); 83 84 /* USB must not be using PLLB */ 85 if ((scsr & at91_pm_data.uhp_udp_mask) != 0) { 86 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 87 return 0; 88 } 89 90 /* PCK0..PCK3 must be disabled, or configured to use clk32k */ 91 for (i = 0; i < 4; i++) { 92 u32 css; 93 94 if ((scsr & (AT91_PMC_PCK0 << i)) == 0) 95 continue; 96 97 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 98 if (css != AT91_PMC_CSS_SLOW) { 99 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); 100 return 0; 101 } 102 } 103 104 return 1; 105 } 106 107 /* 108 * Call this from platform driver suspend() to see how deeply to suspend. 109 * For example, some controllers (like OHCI) need one of the PLL clocks 110 * in order to act as a wakeup source, and those are not available when 111 * going into slow clock mode. 112 * 113 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have 114 * the very same problem (but not using at91 main_clk), and it'd be better 115 * to add one generic API rather than lots of platform-specific ones. 116 */ 117 int at91_suspend_entering_slow_clock(void) 118 { 119 return (target_state == PM_SUSPEND_MEM); 120 } 121 EXPORT_SYMBOL(at91_suspend_entering_slow_clock); 122 123 static void (*at91_suspend_sram_fn)(void __iomem *pmc, void __iomem *ramc0, 124 void __iomem *ramc1, int memctrl); 125 126 extern void at91_pm_suspend_in_sram(void __iomem *pmc, void __iomem *ramc0, 127 void __iomem *ramc1, int memctrl); 128 extern u32 at91_pm_suspend_in_sram_sz; 129 130 static void at91_pm_suspend(suspend_state_t state) 131 { 132 unsigned int pm_data = at91_pm_data.memctrl; 133 134 pm_data |= (state == PM_SUSPEND_MEM) ? 135 AT91_PM_MODE(AT91_PM_SLOW_CLOCK) : 0; 136 137 flush_cache_all(); 138 outer_disable(); 139 140 at91_suspend_sram_fn(at91_pmc_base, at91_ramc_base[0], 141 at91_ramc_base[1], pm_data); 142 143 outer_resume(); 144 } 145 146 static int at91_pm_enter(suspend_state_t state) 147 { 148 at91_pinctrl_gpio_suspend(); 149 150 switch (state) { 151 /* 152 * Suspend-to-RAM is like STANDBY plus slow clock mode, so 153 * drivers must suspend more deeply, the master clock switches 154 * to the clk32k and turns off the main oscillator 155 */ 156 case PM_SUSPEND_MEM: 157 /* 158 * Ensure that clocks are in a valid state. 159 */ 160 if (!at91_pm_verify_clocks()) 161 goto error; 162 163 at91_pm_suspend(state); 164 165 break; 166 167 /* 168 * STANDBY mode has *all* drivers suspended; ignores irqs not 169 * marked as 'wakeup' event sources; and reduces DRAM power. 170 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and 171 * nothing fancy done with main or cpu clocks. 172 */ 173 case PM_SUSPEND_STANDBY: 174 at91_pm_suspend(state); 175 break; 176 177 case PM_SUSPEND_ON: 178 cpu_do_idle(); 179 break; 180 181 default: 182 pr_debug("AT91: PM - bogus suspend state %d\n", state); 183 goto error; 184 } 185 186 error: 187 target_state = PM_SUSPEND_ON; 188 189 at91_pinctrl_gpio_resume(); 190 return 0; 191 } 192 193 /* 194 * Called right prior to thawing processes. 195 */ 196 static void at91_pm_end(void) 197 { 198 target_state = PM_SUSPEND_ON; 199 } 200 201 202 static const struct platform_suspend_ops at91_pm_ops = { 203 .valid = at91_pm_valid_state, 204 .begin = at91_pm_begin, 205 .enter = at91_pm_enter, 206 .end = at91_pm_end, 207 }; 208 209 static struct platform_device at91_cpuidle_device = { 210 .name = "cpuidle-at91", 211 }; 212 213 static void at91_pm_set_standby(void (*at91_standby)(void)) 214 { 215 if (at91_standby) 216 at91_cpuidle_device.dev.platform_data = at91_standby; 217 } 218 219 static const struct of_device_id ramc_ids[] __initconst = { 220 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, 221 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, 222 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, 223 { .compatible = "atmel,sama5d3-ddramc", .data = at91_ddr_standby }, 224 { /*sentinel*/ } 225 }; 226 227 static __init void at91_dt_ramc(void) 228 { 229 struct device_node *np; 230 const struct of_device_id *of_id; 231 int idx = 0; 232 const void *standby = NULL; 233 234 for_each_matching_node_and_match(np, ramc_ids, &of_id) { 235 at91_ramc_base[idx] = of_iomap(np, 0); 236 if (!at91_ramc_base[idx]) 237 panic(pr_fmt("unable to map ramc[%d] cpu registers\n"), idx); 238 239 if (!standby) 240 standby = of_id->data; 241 242 idx++; 243 } 244 245 if (!idx) 246 panic(pr_fmt("unable to find compatible ram controller node in dtb\n")); 247 248 if (!standby) { 249 pr_warn("ramc no standby function available\n"); 250 return; 251 } 252 253 at91_pm_set_standby(standby); 254 } 255 256 static void __init at91_pm_sram_init(void) 257 { 258 struct gen_pool *sram_pool; 259 phys_addr_t sram_pbase; 260 unsigned long sram_base; 261 struct device_node *node; 262 struct platform_device *pdev = NULL; 263 264 for_each_compatible_node(node, NULL, "mmio-sram") { 265 pdev = of_find_device_by_node(node); 266 if (pdev) { 267 of_node_put(node); 268 break; 269 } 270 } 271 272 if (!pdev) { 273 pr_warn("%s: failed to find sram device!\n", __func__); 274 return; 275 } 276 277 sram_pool = dev_get_gen_pool(&pdev->dev); 278 if (!sram_pool) { 279 pr_warn("%s: sram pool unavailable!\n", __func__); 280 return; 281 } 282 283 sram_base = gen_pool_alloc(sram_pool, at91_pm_suspend_in_sram_sz); 284 if (!sram_base) { 285 pr_warn("%s: unable to alloc sram!\n", __func__); 286 return; 287 } 288 289 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); 290 at91_suspend_sram_fn = __arm_ioremap_exec(sram_pbase, 291 at91_pm_suspend_in_sram_sz, false); 292 if (!at91_suspend_sram_fn) { 293 pr_warn("SRAM: Could not map\n"); 294 return; 295 } 296 297 /* Copy the pm suspend handler to SRAM */ 298 at91_suspend_sram_fn = fncpy(at91_suspend_sram_fn, 299 &at91_pm_suspend_in_sram, at91_pm_suspend_in_sram_sz); 300 } 301 302 static void __init at91_pm_init(void) 303 { 304 at91_pm_sram_init(); 305 306 if (at91_cpuidle_device.dev.platform_data) 307 platform_device_register(&at91_cpuidle_device); 308 309 if (at91_suspend_sram_fn) 310 suspend_set_ops(&at91_pm_ops); 311 else 312 pr_info("AT91: PM not supported, due to no SRAM allocated\n"); 313 } 314 315 void __init at91rm9200_pm_init(void) 316 { 317 at91_dt_ramc(); 318 319 /* 320 * AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. 321 */ 322 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); 323 324 at91_pm_data.uhp_udp_mask = AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP; 325 at91_pm_data.memctrl = AT91_MEMCTRL_MC; 326 327 at91_pm_init(); 328 } 329 330 void __init at91sam9260_pm_init(void) 331 { 332 at91_dt_ramc(); 333 at91_pm_data.memctrl = AT91_MEMCTRL_SDRAMC; 334 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; 335 return at91_pm_init(); 336 } 337 338 void __init at91sam9g45_pm_init(void) 339 { 340 at91_dt_ramc(); 341 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP; 342 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; 343 return at91_pm_init(); 344 } 345 346 void __init at91sam9x5_pm_init(void) 347 { 348 at91_dt_ramc(); 349 at91_pm_data.uhp_udp_mask = AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP; 350 at91_pm_data.memctrl = AT91_MEMCTRL_DDRSDR; 351 return at91_pm_init(); 352 } 353