1 /* 2 * arch/arm/mach-at91/pm.c 3 * AT91 Power Management 4 * 5 * Copyright (C) 2005 David Brownell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 13 #include <linux/gpio.h> 14 #include <linux/suspend.h> 15 #include <linux/sched.h> 16 #include <linux/proc_fs.h> 17 #include <linux/interrupt.h> 18 #include <linux/sysfs.h> 19 #include <linux/module.h> 20 #include <linux/platform_device.h> 21 #include <linux/io.h> 22 #include <linux/clk/at91_pmc.h> 23 24 #include <asm/irq.h> 25 #include <linux/atomic.h> 26 #include <asm/mach/time.h> 27 #include <asm/mach/irq.h> 28 29 #include <mach/cpu.h> 30 #include <mach/hardware.h> 31 32 #include "at91_aic.h" 33 #include "generic.h" 34 #include "pm.h" 35 #include "gpio.h" 36 37 static void (*at91_pm_standby)(void); 38 39 static int at91_pm_valid_state(suspend_state_t state) 40 { 41 switch (state) { 42 case PM_SUSPEND_ON: 43 case PM_SUSPEND_STANDBY: 44 case PM_SUSPEND_MEM: 45 return 1; 46 47 default: 48 return 0; 49 } 50 } 51 52 53 static suspend_state_t target_state; 54 55 /* 56 * Called after processes are frozen, but before we shutdown devices. 57 */ 58 static int at91_pm_begin(suspend_state_t state) 59 { 60 target_state = state; 61 return 0; 62 } 63 64 /* 65 * Verify that all the clocks are correct before entering 66 * slow-clock mode. 67 */ 68 static int at91_pm_verify_clocks(void) 69 { 70 unsigned long scsr; 71 int i; 72 73 scsr = at91_pmc_read(AT91_PMC_SCSR); 74 75 /* USB must not be using PLLB */ 76 if (cpu_is_at91rm9200()) { 77 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { 78 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 79 return 0; 80 } 81 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() 82 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { 83 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { 84 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 85 return 0; 86 } 87 } 88 89 /* PCK0..PCK3 must be disabled, or configured to use clk32k */ 90 for (i = 0; i < 4; i++) { 91 u32 css; 92 93 if ((scsr & (AT91_PMC_PCK0 << i)) == 0) 94 continue; 95 96 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 97 if (css != AT91_PMC_CSS_SLOW) { 98 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); 99 return 0; 100 } 101 } 102 103 return 1; 104 } 105 106 /* 107 * Call this from platform driver suspend() to see how deeply to suspend. 108 * For example, some controllers (like OHCI) need one of the PLL clocks 109 * in order to act as a wakeup source, and those are not available when 110 * going into slow clock mode. 111 * 112 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have 113 * the very same problem (but not using at91 main_clk), and it'd be better 114 * to add one generic API rather than lots of platform-specific ones. 115 */ 116 int at91_suspend_entering_slow_clock(void) 117 { 118 return (target_state == PM_SUSPEND_MEM); 119 } 120 EXPORT_SYMBOL(at91_suspend_entering_slow_clock); 121 122 123 static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, 124 void __iomem *ramc1, int memctrl); 125 126 #ifdef CONFIG_AT91_SLOW_CLOCK 127 extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, 128 void __iomem *ramc1, int memctrl); 129 extern u32 at91_slow_clock_sz; 130 #endif 131 132 static int at91_pm_enter(suspend_state_t state) 133 { 134 if (of_have_populated_dt()) 135 at91_pinctrl_gpio_suspend(); 136 else 137 at91_gpio_suspend(); 138 139 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) { 140 at91_irq_suspend(); 141 142 pr_debug("AT91: PM - wake mask %08x, pm state %d\n", 143 /* remember all the always-wake irqs */ 144 (at91_pmc_read(AT91_PMC_PCSR) 145 | (1 << AT91_ID_FIQ) 146 | (1 << AT91_ID_SYS) 147 | (at91_get_extern_irq())) 148 & at91_aic_read(AT91_AIC_IMR), 149 state); 150 } 151 152 switch (state) { 153 /* 154 * Suspend-to-RAM is like STANDBY plus slow clock mode, so 155 * drivers must suspend more deeply: only the master clock 156 * controller may be using the main oscillator. 157 */ 158 case PM_SUSPEND_MEM: 159 /* 160 * Ensure that clocks are in a valid state. 161 */ 162 if (!at91_pm_verify_clocks()) 163 goto error; 164 165 /* 166 * Enter slow clock mode by switching over to clk32k and 167 * turning off the main oscillator; reverse on wakeup. 168 */ 169 if (slow_clock) { 170 int memctrl = AT91_MEMCTRL_SDRAMC; 171 172 if (cpu_is_at91rm9200()) 173 memctrl = AT91_MEMCTRL_MC; 174 else if (cpu_is_at91sam9g45()) 175 memctrl = AT91_MEMCTRL_DDRSDR; 176 #ifdef CONFIG_AT91_SLOW_CLOCK 177 /* copy slow_clock handler to SRAM, and call it */ 178 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); 179 #endif 180 slow_clock(at91_pmc_base, at91_ramc_base[0], 181 at91_ramc_base[1], memctrl); 182 break; 183 } else { 184 pr_info("AT91: PM - no slow clock mode enabled ...\n"); 185 /* FALLTHROUGH leaving master clock alone */ 186 } 187 188 /* 189 * STANDBY mode has *all* drivers suspended; ignores irqs not 190 * marked as 'wakeup' event sources; and reduces DRAM power. 191 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and 192 * nothing fancy done with main or cpu clocks. 193 */ 194 case PM_SUSPEND_STANDBY: 195 /* 196 * NOTE: the Wait-for-Interrupt instruction needs to be 197 * in icache so no SDRAM accesses are needed until the 198 * wakeup IRQ occurs and self-refresh is terminated. 199 * For ARM 926 based chips, this requirement is weaker 200 * as at91sam9 can access a RAM in self-refresh mode. 201 */ 202 if (at91_pm_standby) 203 at91_pm_standby(); 204 break; 205 206 case PM_SUSPEND_ON: 207 cpu_do_idle(); 208 break; 209 210 default: 211 pr_debug("AT91: PM - bogus suspend state %d\n", state); 212 goto error; 213 } 214 215 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) 216 pr_debug("AT91: PM - wakeup %08x\n", 217 at91_aic_read(AT91_AIC_IPR) & 218 at91_aic_read(AT91_AIC_IMR)); 219 220 error: 221 target_state = PM_SUSPEND_ON; 222 223 if (IS_ENABLED(CONFIG_OLD_IRQ_AT91) && at91_aic_base) 224 at91_irq_resume(); 225 226 if (of_have_populated_dt()) 227 at91_pinctrl_gpio_resume(); 228 else 229 at91_gpio_resume(); 230 return 0; 231 } 232 233 /* 234 * Called right prior to thawing processes. 235 */ 236 static void at91_pm_end(void) 237 { 238 target_state = PM_SUSPEND_ON; 239 } 240 241 242 static const struct platform_suspend_ops at91_pm_ops = { 243 .valid = at91_pm_valid_state, 244 .begin = at91_pm_begin, 245 .enter = at91_pm_enter, 246 .end = at91_pm_end, 247 }; 248 249 static struct platform_device at91_cpuidle_device = { 250 .name = "cpuidle-at91", 251 }; 252 253 void at91_pm_set_standby(void (*at91_standby)(void)) 254 { 255 if (at91_standby) { 256 at91_cpuidle_device.dev.platform_data = at91_standby; 257 at91_pm_standby = at91_standby; 258 } 259 } 260 261 static int __init at91_pm_init(void) 262 { 263 #ifdef CONFIG_AT91_SLOW_CLOCK 264 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz); 265 #endif 266 267 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); 268 269 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ 270 if (cpu_is_at91rm9200()) 271 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); 272 273 if (at91_cpuidle_device.dev.platform_data) 274 platform_device_register(&at91_cpuidle_device); 275 276 suspend_set_ops(&at91_pm_ops); 277 278 return 0; 279 } 280 arch_initcall(at91_pm_init); 281