1 /* 2 * arch/arm/mach-at91/pm.c 3 * AT91 Power Management 4 * 5 * Copyright (C) 2005 David Brownell 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 13 #include <linux/gpio.h> 14 #include <linux/suspend.h> 15 #include <linux/sched.h> 16 #include <linux/proc_fs.h> 17 #include <linux/interrupt.h> 18 #include <linux/sysfs.h> 19 #include <linux/module.h> 20 #include <linux/platform_device.h> 21 #include <linux/io.h> 22 23 #include <asm/irq.h> 24 #include <linux/atomic.h> 25 #include <asm/mach/time.h> 26 #include <asm/mach/irq.h> 27 28 #include <mach/at91_pmc.h> 29 #include <mach/cpu.h> 30 31 #include "at91_aic.h" 32 #include "generic.h" 33 #include "pm.h" 34 35 /* 36 * Show the reason for the previous system reset. 37 */ 38 39 #include "at91_rstc.h" 40 #include "at91_shdwc.h" 41 42 static void (*at91_pm_standby)(void); 43 44 static void __init show_reset_status(void) 45 { 46 static char reset[] __initdata = "reset"; 47 48 static char general[] __initdata = "general"; 49 static char wakeup[] __initdata = "wakeup"; 50 static char watchdog[] __initdata = "watchdog"; 51 static char software[] __initdata = "software"; 52 static char user[] __initdata = "user"; 53 static char unknown[] __initdata = "unknown"; 54 55 static char signal[] __initdata = "signal"; 56 static char rtc[] __initdata = "rtc"; 57 static char rtt[] __initdata = "rtt"; 58 static char restore[] __initdata = "power-restored"; 59 60 char *reason, *r2 = reset; 61 u32 reset_type, wake_type; 62 63 if (!at91_shdwc_base || !at91_rstc_base) 64 return; 65 66 reset_type = at91_rstc_read(AT91_RSTC_SR) & AT91_RSTC_RSTTYP; 67 wake_type = at91_shdwc_read(AT91_SHDW_SR); 68 69 switch (reset_type) { 70 case AT91_RSTC_RSTTYP_GENERAL: 71 reason = general; 72 break; 73 case AT91_RSTC_RSTTYP_WAKEUP: 74 /* board-specific code enabled the wakeup sources */ 75 reason = wakeup; 76 77 /* "wakeup signal" */ 78 if (wake_type & AT91_SHDW_WAKEUP0) 79 r2 = signal; 80 else { 81 r2 = reason; 82 if (wake_type & AT91_SHDW_RTTWK) /* rtt wakeup */ 83 reason = rtt; 84 else if (wake_type & AT91_SHDW_RTCWK) /* rtc wakeup */ 85 reason = rtc; 86 else if (wake_type == 0) /* power-restored wakeup */ 87 reason = restore; 88 else /* unknown wakeup */ 89 reason = unknown; 90 } 91 break; 92 case AT91_RSTC_RSTTYP_WATCHDOG: 93 reason = watchdog; 94 break; 95 case AT91_RSTC_RSTTYP_SOFTWARE: 96 reason = software; 97 break; 98 case AT91_RSTC_RSTTYP_USER: 99 reason = user; 100 break; 101 default: 102 reason = unknown; 103 break; 104 } 105 pr_info("AT91: Starting after %s %s\n", reason, r2); 106 } 107 108 static int at91_pm_valid_state(suspend_state_t state) 109 { 110 switch (state) { 111 case PM_SUSPEND_ON: 112 case PM_SUSPEND_STANDBY: 113 case PM_SUSPEND_MEM: 114 return 1; 115 116 default: 117 return 0; 118 } 119 } 120 121 122 static suspend_state_t target_state; 123 124 /* 125 * Called after processes are frozen, but before we shutdown devices. 126 */ 127 static int at91_pm_begin(suspend_state_t state) 128 { 129 target_state = state; 130 return 0; 131 } 132 133 /* 134 * Verify that all the clocks are correct before entering 135 * slow-clock mode. 136 */ 137 static int at91_pm_verify_clocks(void) 138 { 139 unsigned long scsr; 140 int i; 141 142 scsr = at91_pmc_read(AT91_PMC_SCSR); 143 144 /* USB must not be using PLLB */ 145 if (cpu_is_at91rm9200()) { 146 if ((scsr & (AT91RM9200_PMC_UHP | AT91RM9200_PMC_UDP)) != 0) { 147 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 148 return 0; 149 } 150 } else if (cpu_is_at91sam9260() || cpu_is_at91sam9261() || cpu_is_at91sam9263() 151 || cpu_is_at91sam9g20() || cpu_is_at91sam9g10()) { 152 if ((scsr & (AT91SAM926x_PMC_UHP | AT91SAM926x_PMC_UDP)) != 0) { 153 pr_err("AT91: PM - Suspend-to-RAM with USB still active\n"); 154 return 0; 155 } 156 } 157 158 if (!IS_ENABLED(CONFIG_AT91_PROGRAMMABLE_CLOCKS)) 159 return 1; 160 161 /* PCK0..PCK3 must be disabled, or configured to use clk32k */ 162 for (i = 0; i < 4; i++) { 163 u32 css; 164 165 if ((scsr & (AT91_PMC_PCK0 << i)) == 0) 166 continue; 167 168 css = at91_pmc_read(AT91_PMC_PCKR(i)) & AT91_PMC_CSS; 169 if (css != AT91_PMC_CSS_SLOW) { 170 pr_err("AT91: PM - Suspend-to-RAM with PCK%d src %d\n", i, css); 171 return 0; 172 } 173 } 174 175 return 1; 176 } 177 178 /* 179 * Call this from platform driver suspend() to see how deeply to suspend. 180 * For example, some controllers (like OHCI) need one of the PLL clocks 181 * in order to act as a wakeup source, and those are not available when 182 * going into slow clock mode. 183 * 184 * REVISIT: generalize as clk_will_be_available(clk)? Other platforms have 185 * the very same problem (but not using at91 main_clk), and it'd be better 186 * to add one generic API rather than lots of platform-specific ones. 187 */ 188 int at91_suspend_entering_slow_clock(void) 189 { 190 return (target_state == PM_SUSPEND_MEM); 191 } 192 EXPORT_SYMBOL(at91_suspend_entering_slow_clock); 193 194 195 static void (*slow_clock)(void __iomem *pmc, void __iomem *ramc0, 196 void __iomem *ramc1, int memctrl); 197 198 #ifdef CONFIG_AT91_SLOW_CLOCK 199 extern void at91_slow_clock(void __iomem *pmc, void __iomem *ramc0, 200 void __iomem *ramc1, int memctrl); 201 extern u32 at91_slow_clock_sz; 202 #endif 203 204 static int at91_pm_enter(suspend_state_t state) 205 { 206 if (of_have_populated_dt()) 207 at91_pinctrl_gpio_suspend(); 208 else 209 at91_gpio_suspend(); 210 at91_irq_suspend(); 211 212 pr_debug("AT91: PM - wake mask %08x, pm state %d\n", 213 /* remember all the always-wake irqs */ 214 (at91_pmc_read(AT91_PMC_PCSR) 215 | (1 << AT91_ID_FIQ) 216 | (1 << AT91_ID_SYS) 217 | (at91_get_extern_irq())) 218 & at91_aic_read(AT91_AIC_IMR), 219 state); 220 221 switch (state) { 222 /* 223 * Suspend-to-RAM is like STANDBY plus slow clock mode, so 224 * drivers must suspend more deeply: only the master clock 225 * controller may be using the main oscillator. 226 */ 227 case PM_SUSPEND_MEM: 228 /* 229 * Ensure that clocks are in a valid state. 230 */ 231 if (!at91_pm_verify_clocks()) 232 goto error; 233 234 /* 235 * Enter slow clock mode by switching over to clk32k and 236 * turning off the main oscillator; reverse on wakeup. 237 */ 238 if (slow_clock) { 239 int memctrl = AT91_MEMCTRL_SDRAMC; 240 241 if (cpu_is_at91rm9200()) 242 memctrl = AT91_MEMCTRL_MC; 243 else if (cpu_is_at91sam9g45()) 244 memctrl = AT91_MEMCTRL_DDRSDR; 245 #ifdef CONFIG_AT91_SLOW_CLOCK 246 /* copy slow_clock handler to SRAM, and call it */ 247 memcpy(slow_clock, at91_slow_clock, at91_slow_clock_sz); 248 #endif 249 slow_clock(at91_pmc_base, at91_ramc_base[0], 250 at91_ramc_base[1], memctrl); 251 break; 252 } else { 253 pr_info("AT91: PM - no slow clock mode enabled ...\n"); 254 /* FALLTHROUGH leaving master clock alone */ 255 } 256 257 /* 258 * STANDBY mode has *all* drivers suspended; ignores irqs not 259 * marked as 'wakeup' event sources; and reduces DRAM power. 260 * But otherwise it's identical to PM_SUSPEND_ON: cpu idle, and 261 * nothing fancy done with main or cpu clocks. 262 */ 263 case PM_SUSPEND_STANDBY: 264 /* 265 * NOTE: the Wait-for-Interrupt instruction needs to be 266 * in icache so no SDRAM accesses are needed until the 267 * wakeup IRQ occurs and self-refresh is terminated. 268 * For ARM 926 based chips, this requirement is weaker 269 * as at91sam9 can access a RAM in self-refresh mode. 270 */ 271 if (at91_pm_standby) 272 at91_pm_standby(); 273 break; 274 275 case PM_SUSPEND_ON: 276 cpu_do_idle(); 277 break; 278 279 default: 280 pr_debug("AT91: PM - bogus suspend state %d\n", state); 281 goto error; 282 } 283 284 pr_debug("AT91: PM - wakeup %08x\n", 285 at91_aic_read(AT91_AIC_IPR) & at91_aic_read(AT91_AIC_IMR)); 286 287 error: 288 target_state = PM_SUSPEND_ON; 289 at91_irq_resume(); 290 if (of_have_populated_dt()) 291 at91_pinctrl_gpio_resume(); 292 else 293 at91_gpio_resume(); 294 return 0; 295 } 296 297 /* 298 * Called right prior to thawing processes. 299 */ 300 static void at91_pm_end(void) 301 { 302 target_state = PM_SUSPEND_ON; 303 } 304 305 306 static const struct platform_suspend_ops at91_pm_ops = { 307 .valid = at91_pm_valid_state, 308 .begin = at91_pm_begin, 309 .enter = at91_pm_enter, 310 .end = at91_pm_end, 311 }; 312 313 static struct platform_device at91_cpuidle_device = { 314 .name = "cpuidle-at91", 315 }; 316 317 void at91_pm_set_standby(void (*at91_standby)(void)) 318 { 319 if (at91_standby) { 320 at91_cpuidle_device.dev.platform_data = at91_standby; 321 at91_pm_standby = at91_standby; 322 } 323 } 324 325 static int __init at91_pm_init(void) 326 { 327 #ifdef CONFIG_AT91_SLOW_CLOCK 328 slow_clock = (void *) (AT91_IO_VIRT_BASE - at91_slow_clock_sz); 329 #endif 330 331 pr_info("AT91: Power Management%s\n", (slow_clock ? " (with slow clock mode)" : "")); 332 333 /* AT91RM9200 SDRAM low-power mode cannot be used with self-refresh. */ 334 if (cpu_is_at91rm9200()) 335 at91_ramc_write(0, AT91RM9200_SDRAMC_LPR, 0); 336 337 if (at91_cpuidle_device.dev.platform_data) 338 platform_device_register(&at91_cpuidle_device); 339 340 suspend_set_ops(&at91_pm_ops); 341 342 show_reset_status(); 343 return 0; 344 } 345 arch_initcall(at91_pm_init); 346