1 /* 2 * arch/arm/kernel/topology.c 3 * 4 * Copyright (C) 2011 Linaro Limited. 5 * Written by: Vincent Guittot 6 * 7 * based on arch/sh/kernel/topology.c 8 * 9 * This file is subject to the terms and conditions of the GNU General Public 10 * License. See the file "COPYING" in the main directory of this archive 11 * for more details. 12 */ 13 14 #include <linux/arch_topology.h> 15 #include <linux/cpu.h> 16 #include <linux/cpufreq.h> 17 #include <linux/cpumask.h> 18 #include <linux/export.h> 19 #include <linux/init.h> 20 #include <linux/percpu.h> 21 #include <linux/node.h> 22 #include <linux/nodemask.h> 23 #include <linux/of.h> 24 #include <linux/sched.h> 25 #include <linux/sched/topology.h> 26 #include <linux/slab.h> 27 #include <linux/string.h> 28 29 #include <asm/cpu.h> 30 #include <asm/cputype.h> 31 #include <asm/topology.h> 32 33 /* 34 * cpu capacity scale management 35 */ 36 37 /* 38 * cpu capacity table 39 * This per cpu data structure describes the relative capacity of each core. 40 * On a heteregenous system, cores don't have the same computation capacity 41 * and we reflect that difference in the cpu_capacity field so the scheduler 42 * can take this difference into account during load balance. A per cpu 43 * structure is preferred because each CPU updates its own cpu_capacity field 44 * during the load balance except for idle cores. One idle core is selected 45 * to run the rebalance_domains for all idle cores and the cpu_capacity can be 46 * updated during this sequence. 47 */ 48 49 #ifdef CONFIG_OF 50 struct cpu_efficiency { 51 const char *compatible; 52 unsigned long efficiency; 53 }; 54 55 /* 56 * Table of relative efficiency of each processors 57 * The efficiency value must fit in 20bit and the final 58 * cpu_scale value must be in the range 59 * 0 < cpu_scale < 3*SCHED_CAPACITY_SCALE/2 60 * in order to return at most 1 when DIV_ROUND_CLOSEST 61 * is used to compute the capacity of a CPU. 62 * Processors that are not defined in the table, 63 * use the default SCHED_CAPACITY_SCALE value for cpu_scale. 64 */ 65 static const struct cpu_efficiency table_efficiency[] = { 66 {"arm,cortex-a15", 3891}, 67 {"arm,cortex-a7", 2048}, 68 {NULL, }, 69 }; 70 71 static unsigned long *__cpu_capacity; 72 #define cpu_capacity(cpu) __cpu_capacity[cpu] 73 74 static unsigned long middle_capacity = 1; 75 static bool cap_from_dt = true; 76 77 /* 78 * Iterate all CPUs' descriptor in DT and compute the efficiency 79 * (as per table_efficiency). Also calculate a middle efficiency 80 * as close as possible to (max{eff_i} - min{eff_i}) / 2 81 * This is later used to scale the cpu_capacity field such that an 82 * 'average' CPU is of middle capacity. Also see the comments near 83 * table_efficiency[] and update_cpu_capacity(). 84 */ 85 static void __init parse_dt_topology(void) 86 { 87 const struct cpu_efficiency *cpu_eff; 88 struct device_node *cn = NULL; 89 unsigned long min_capacity = ULONG_MAX; 90 unsigned long max_capacity = 0; 91 unsigned long capacity = 0; 92 int cpu = 0; 93 94 __cpu_capacity = kcalloc(nr_cpu_ids, sizeof(*__cpu_capacity), 95 GFP_NOWAIT); 96 97 cn = of_find_node_by_path("/cpus"); 98 if (!cn) { 99 pr_err("No CPU information found in DT\n"); 100 return; 101 } 102 103 for_each_possible_cpu(cpu) { 104 const u32 *rate; 105 int len; 106 107 /* too early to use cpu->of_node */ 108 cn = of_get_cpu_node(cpu, NULL); 109 if (!cn) { 110 pr_err("missing device node for CPU %d\n", cpu); 111 continue; 112 } 113 114 if (topology_parse_cpu_capacity(cn, cpu)) { 115 of_node_put(cn); 116 continue; 117 } 118 119 cap_from_dt = false; 120 121 for (cpu_eff = table_efficiency; cpu_eff->compatible; cpu_eff++) 122 if (of_device_is_compatible(cn, cpu_eff->compatible)) 123 break; 124 125 if (cpu_eff->compatible == NULL) 126 continue; 127 128 rate = of_get_property(cn, "clock-frequency", &len); 129 if (!rate || len != 4) { 130 pr_err("%pOF missing clock-frequency property\n", cn); 131 continue; 132 } 133 134 capacity = ((be32_to_cpup(rate)) >> 20) * cpu_eff->efficiency; 135 136 /* Save min capacity of the system */ 137 if (capacity < min_capacity) 138 min_capacity = capacity; 139 140 /* Save max capacity of the system */ 141 if (capacity > max_capacity) 142 max_capacity = capacity; 143 144 cpu_capacity(cpu) = capacity; 145 } 146 147 /* If min and max capacities are equals, we bypass the update of the 148 * cpu_scale because all CPUs have the same capacity. Otherwise, we 149 * compute a middle_capacity factor that will ensure that the capacity 150 * of an 'average' CPU of the system will be as close as possible to 151 * SCHED_CAPACITY_SCALE, which is the default value, but with the 152 * constraint explained near table_efficiency[]. 153 */ 154 if (4*max_capacity < (3*(max_capacity + min_capacity))) 155 middle_capacity = (min_capacity + max_capacity) 156 >> (SCHED_CAPACITY_SHIFT+1); 157 else 158 middle_capacity = ((max_capacity / 3) 159 >> (SCHED_CAPACITY_SHIFT-1)) + 1; 160 161 if (cap_from_dt) 162 topology_normalize_cpu_scale(); 163 } 164 165 /* 166 * Look for a customed capacity of a CPU in the cpu_capacity table during the 167 * boot. The update of all CPUs is in O(n^2) for heteregeneous system but the 168 * function returns directly for SMP system. 169 */ 170 static void update_cpu_capacity(unsigned int cpu) 171 { 172 if (!cpu_capacity(cpu) || cap_from_dt) 173 return; 174 175 topology_set_cpu_scale(cpu, cpu_capacity(cpu) / middle_capacity); 176 177 pr_info("CPU%u: update cpu_capacity %lu\n", 178 cpu, topology_get_cpu_scale(NULL, cpu)); 179 } 180 181 #else 182 static inline void parse_dt_topology(void) {} 183 static inline void update_cpu_capacity(unsigned int cpuid) {} 184 #endif 185 186 /* 187 * cpu topology table 188 */ 189 struct cputopo_arm cpu_topology[NR_CPUS]; 190 EXPORT_SYMBOL_GPL(cpu_topology); 191 192 const struct cpumask *cpu_coregroup_mask(int cpu) 193 { 194 return &cpu_topology[cpu].core_sibling; 195 } 196 197 /* 198 * The current assumption is that we can power gate each core independently. 199 * This will be superseded by DT binding once available. 200 */ 201 const struct cpumask *cpu_corepower_mask(int cpu) 202 { 203 return &cpu_topology[cpu].thread_sibling; 204 } 205 206 static void update_siblings_masks(unsigned int cpuid) 207 { 208 struct cputopo_arm *cpu_topo, *cpuid_topo = &cpu_topology[cpuid]; 209 int cpu; 210 211 /* update core and thread sibling masks */ 212 for_each_possible_cpu(cpu) { 213 cpu_topo = &cpu_topology[cpu]; 214 215 if (cpuid_topo->socket_id != cpu_topo->socket_id) 216 continue; 217 218 cpumask_set_cpu(cpuid, &cpu_topo->core_sibling); 219 if (cpu != cpuid) 220 cpumask_set_cpu(cpu, &cpuid_topo->core_sibling); 221 222 if (cpuid_topo->core_id != cpu_topo->core_id) 223 continue; 224 225 cpumask_set_cpu(cpuid, &cpu_topo->thread_sibling); 226 if (cpu != cpuid) 227 cpumask_set_cpu(cpu, &cpuid_topo->thread_sibling); 228 } 229 smp_wmb(); 230 } 231 232 /* 233 * store_cpu_topology is called at boot when only one cpu is running 234 * and with the mutex cpu_hotplug.lock locked, when several cpus have booted, 235 * which prevents simultaneous write access to cpu_topology array 236 */ 237 void store_cpu_topology(unsigned int cpuid) 238 { 239 struct cputopo_arm *cpuid_topo = &cpu_topology[cpuid]; 240 unsigned int mpidr; 241 242 /* If the cpu topology has been already set, just return */ 243 if (cpuid_topo->core_id != -1) 244 return; 245 246 mpidr = read_cpuid_mpidr(); 247 248 /* create cpu topology mapping */ 249 if ((mpidr & MPIDR_SMP_BITMASK) == MPIDR_SMP_VALUE) { 250 /* 251 * This is a multiprocessor system 252 * multiprocessor format & multiprocessor mode field are set 253 */ 254 255 if (mpidr & MPIDR_MT_BITMASK) { 256 /* core performance interdependency */ 257 cpuid_topo->thread_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); 258 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); 259 cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 2); 260 } else { 261 /* largely independent cores */ 262 cpuid_topo->thread_id = -1; 263 cpuid_topo->core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0); 264 cpuid_topo->socket_id = MPIDR_AFFINITY_LEVEL(mpidr, 1); 265 } 266 } else { 267 /* 268 * This is an uniprocessor system 269 * we are in multiprocessor format but uniprocessor system 270 * or in the old uniprocessor format 271 */ 272 cpuid_topo->thread_id = -1; 273 cpuid_topo->core_id = 0; 274 cpuid_topo->socket_id = -1; 275 } 276 277 update_siblings_masks(cpuid); 278 279 update_cpu_capacity(cpuid); 280 281 pr_info("CPU%u: thread %d, cpu %d, socket %d, mpidr %x\n", 282 cpuid, cpu_topology[cpuid].thread_id, 283 cpu_topology[cpuid].core_id, 284 cpu_topology[cpuid].socket_id, mpidr); 285 } 286 287 static inline int cpu_corepower_flags(void) 288 { 289 return SD_SHARE_PKG_RESOURCES | SD_SHARE_POWERDOMAIN; 290 } 291 292 static struct sched_domain_topology_level arm_topology[] = { 293 #ifdef CONFIG_SCHED_MC 294 { cpu_corepower_mask, cpu_corepower_flags, SD_INIT_NAME(GMC) }, 295 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, 296 #endif 297 { cpu_cpu_mask, SD_INIT_NAME(DIE) }, 298 { NULL, }, 299 }; 300 301 /* 302 * init_cpu_topology is called at boot when only one cpu is running 303 * which prevent simultaneous write access to cpu_topology array 304 */ 305 void __init init_cpu_topology(void) 306 { 307 unsigned int cpu; 308 309 /* init core mask and capacity */ 310 for_each_possible_cpu(cpu) { 311 struct cputopo_arm *cpu_topo = &(cpu_topology[cpu]); 312 313 cpu_topo->thread_id = -1; 314 cpu_topo->core_id = -1; 315 cpu_topo->socket_id = -1; 316 cpumask_clear(&cpu_topo->core_sibling); 317 cpumask_clear(&cpu_topo->thread_sibling); 318 } 319 smp_wmb(); 320 321 parse_dt_topology(); 322 323 /* Set scheduler topology descriptor */ 324 set_sched_topology(arm_topology); 325 } 326