1 /* 2 * linux/arch/arm/kernel/swp_emulate.c 3 * 4 * Copyright (C) 2009 ARM Limited 5 * __user_* functions adapted from include/asm/uaccess.h 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Implements emulation of the SWP/SWPB instructions using load-exclusive and 12 * store-exclusive for processors that have them disabled (or future ones that 13 * might not implement them). 14 * 15 * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>] 16 * Where: Rt = destination 17 * Rt2 = source 18 * Rn = address 19 */ 20 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/proc_fs.h> 24 #include <linux/seq_file.h> 25 #include <linux/sched.h> 26 #include <linux/sched/mm.h> 27 #include <linux/syscalls.h> 28 #include <linux/perf_event.h> 29 30 #include <asm/opcodes.h> 31 #include <asm/system_info.h> 32 #include <asm/traps.h> 33 #include <linux/uaccess.h> 34 35 /* 36 * Error-checking SWP macros implemented using ldrex{b}/strex{b} 37 */ 38 #define __user_swpX_asm(data, addr, res, temp, B) \ 39 __asm__ __volatile__( \ 40 "0: ldrex"B" %2, [%3]\n" \ 41 "1: strex"B" %0, %1, [%3]\n" \ 42 " cmp %0, #0\n" \ 43 " moveq %1, %2\n" \ 44 " movne %0, %4\n" \ 45 "2:\n" \ 46 " .section .text.fixup,\"ax\"\n" \ 47 " .align 2\n" \ 48 "3: mov %0, %5\n" \ 49 " b 2b\n" \ 50 " .previous\n" \ 51 " .section __ex_table,\"a\"\n" \ 52 " .align 3\n" \ 53 " .long 0b, 3b\n" \ 54 " .long 1b, 3b\n" \ 55 " .previous" \ 56 : "=&r" (res), "+r" (data), "=&r" (temp) \ 57 : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \ 58 : "cc", "memory") 59 60 #define __user_swp_asm(data, addr, res, temp) \ 61 __user_swpX_asm(data, addr, res, temp, "") 62 #define __user_swpb_asm(data, addr, res, temp) \ 63 __user_swpX_asm(data, addr, res, temp, "b") 64 65 /* 66 * Macros/defines for extracting register numbers from instruction. 67 */ 68 #define EXTRACT_REG_NUM(instruction, offset) \ 69 (((instruction) & (0xf << (offset))) >> (offset)) 70 #define RN_OFFSET 16 71 #define RT_OFFSET 12 72 #define RT2_OFFSET 0 73 /* 74 * Bit 22 of the instruction encoding distinguishes between 75 * the SWP and SWPB variants (bit set means SWPB). 76 */ 77 #define TYPE_SWPB (1 << 22) 78 79 static unsigned long swpcounter; 80 static unsigned long swpbcounter; 81 static unsigned long abtcounter; 82 static pid_t previous_pid; 83 84 #ifdef CONFIG_PROC_FS 85 static int proc_status_show(struct seq_file *m, void *v) 86 { 87 seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter); 88 seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter); 89 seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter); 90 if (previous_pid != 0) 91 seq_printf(m, "Last process:\t\t%d\n", previous_pid); 92 return 0; 93 } 94 #endif 95 96 /* 97 * Set up process info to signal segmentation fault - called on access error. 98 */ 99 static void set_segfault(struct pt_regs *regs, unsigned long addr) 100 { 101 siginfo_t info; 102 103 clear_siginfo(&info); 104 down_read(¤t->mm->mmap_sem); 105 if (find_vma(current->mm, addr) == NULL) 106 info.si_code = SEGV_MAPERR; 107 else 108 info.si_code = SEGV_ACCERR; 109 up_read(¤t->mm->mmap_sem); 110 111 info.si_signo = SIGSEGV; 112 info.si_errno = 0; 113 info.si_addr = (void *) instruction_pointer(regs); 114 115 pr_debug("SWP{B} emulation: access caused memory abort!\n"); 116 arm_notify_die("Illegal memory access", regs, &info, 0, 0); 117 118 abtcounter++; 119 } 120 121 static int emulate_swpX(unsigned int address, unsigned int *data, 122 unsigned int type) 123 { 124 unsigned int res = 0; 125 126 if ((type != TYPE_SWPB) && (address & 0x3)) { 127 /* SWP to unaligned address not permitted */ 128 pr_debug("SWP instruction on unaligned pointer!\n"); 129 return -EFAULT; 130 } 131 132 while (1) { 133 unsigned long temp; 134 unsigned int __ua_flags; 135 136 __ua_flags = uaccess_save_and_enable(); 137 if (type == TYPE_SWPB) 138 __user_swpb_asm(*data, address, res, temp); 139 else 140 __user_swp_asm(*data, address, res, temp); 141 uaccess_restore(__ua_flags); 142 143 if (likely(res != -EAGAIN) || signal_pending(current)) 144 break; 145 146 cond_resched(); 147 } 148 149 if (res == 0) { 150 if (type == TYPE_SWPB) 151 swpbcounter++; 152 else 153 swpcounter++; 154 } 155 156 return res; 157 } 158 159 /* 160 * swp_handler logs the id of calling process, dissects the instruction, sanity 161 * checks the memory location, calls emulate_swpX for the actual operation and 162 * deals with fixup/error handling before returning 163 */ 164 static int swp_handler(struct pt_regs *regs, unsigned int instr) 165 { 166 unsigned int address, destreg, data, type; 167 unsigned int res = 0; 168 169 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); 170 171 res = arm_check_condition(instr, regs->ARM_cpsr); 172 switch (res) { 173 case ARM_OPCODE_CONDTEST_PASS: 174 break; 175 case ARM_OPCODE_CONDTEST_FAIL: 176 /* Condition failed - return to next instruction */ 177 regs->ARM_pc += 4; 178 return 0; 179 case ARM_OPCODE_CONDTEST_UNCOND: 180 /* If unconditional encoding - not a SWP, undef */ 181 return -EFAULT; 182 default: 183 return -EINVAL; 184 } 185 186 if (current->pid != previous_pid) { 187 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", 188 current->comm, (unsigned long)current->pid); 189 previous_pid = current->pid; 190 } 191 192 address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)]; 193 data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)]; 194 destreg = EXTRACT_REG_NUM(instr, RT_OFFSET); 195 196 type = instr & TYPE_SWPB; 197 198 pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n", 199 EXTRACT_REG_NUM(instr, RN_OFFSET), address, 200 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data); 201 202 /* Check access in reasonable access range for both SWP and SWPB */ 203 if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) { 204 pr_debug("SWP{B} emulation: access to %p not allowed!\n", 205 (void *)address); 206 res = -EFAULT; 207 } else { 208 res = emulate_swpX(address, &data, type); 209 } 210 211 if (res == 0) { 212 /* 213 * On successful emulation, revert the adjustment to the PC 214 * made in kernel/traps.c in order to resume execution at the 215 * instruction following the SWP{B}. 216 */ 217 regs->ARM_pc += 4; 218 regs->uregs[destreg] = data; 219 } else if (res == -EFAULT) { 220 /* 221 * Memory errors do not mean emulation failed. 222 * Set up signal info to return SEGV, then return OK 223 */ 224 set_segfault(regs, address); 225 } 226 227 return 0; 228 } 229 230 /* 231 * Only emulate SWP/SWPB executed in ARM state/User mode. 232 * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE. 233 */ 234 static struct undef_hook swp_hook = { 235 .instr_mask = 0x0fb00ff0, 236 .instr_val = 0x01000090, 237 .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT, 238 .cpsr_val = USR_MODE, 239 .fn = swp_handler 240 }; 241 242 /* 243 * Register handler and create status file in /proc/cpu 244 * Invoked as late_initcall, since not needed before init spawned. 245 */ 246 static int __init swp_emulation_init(void) 247 { 248 if (cpu_architecture() < CPU_ARCH_ARMv7) 249 return 0; 250 251 #ifdef CONFIG_PROC_FS 252 if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL, 253 proc_status_show)) 254 return -ENOMEM; 255 #endif /* CONFIG_PROC_FS */ 256 257 pr_notice("Registering SWP/SWPB emulation handler\n"); 258 register_undef_hook(&swp_hook); 259 260 return 0; 261 } 262 263 late_initcall(swp_emulation_init); 264