xref: /openbmc/linux/arch/arm/kernel/swp_emulate.c (revision 6d99a79c)
1 /*
2  *  linux/arch/arm/kernel/swp_emulate.c
3  *
4  *  Copyright (C) 2009 ARM Limited
5  *  __user_* functions adapted from include/asm/uaccess.h
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License version 2 as
9  * published by the Free Software Foundation.
10  *
11  *  Implements emulation of the SWP/SWPB instructions using load-exclusive and
12  *  store-exclusive for processors that have them disabled (or future ones that
13  *  might not implement them).
14  *
15  *  Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>]
16  *  Where: Rt  = destination
17  *	   Rt2 = source
18  *	   Rn  = address
19  */
20 
21 #include <linux/init.h>
22 #include <linux/kernel.h>
23 #include <linux/proc_fs.h>
24 #include <linux/seq_file.h>
25 #include <linux/sched.h>
26 #include <linux/sched/mm.h>
27 #include <linux/syscalls.h>
28 #include <linux/perf_event.h>
29 
30 #include <asm/opcodes.h>
31 #include <asm/system_info.h>
32 #include <asm/traps.h>
33 #include <linux/uaccess.h>
34 
35 /*
36  * Error-checking SWP macros implemented using ldrex{b}/strex{b}
37  */
38 #define __user_swpX_asm(data, addr, res, temp, B)		\
39 	__asm__ __volatile__(					\
40 	"0:	ldrex"B"	%2, [%3]\n"			\
41 	"1:	strex"B"	%0, %1, [%3]\n"			\
42 	"	cmp		%0, #0\n"			\
43 	"	moveq		%1, %2\n"			\
44 	"	movne		%0, %4\n"			\
45 	"2:\n"							\
46 	"	.section	 .text.fixup,\"ax\"\n"		\
47 	"	.align		2\n"				\
48 	"3:	mov		%0, %5\n"			\
49 	"	b		2b\n"				\
50 	"	.previous\n"					\
51 	"	.section	 __ex_table,\"a\"\n"		\
52 	"	.align		3\n"				\
53 	"	.long		0b, 3b\n"			\
54 	"	.long		1b, 3b\n"			\
55 	"	.previous"					\
56 	: "=&r" (res), "+r" (data), "=&r" (temp)		\
57 	: "r" (addr), "i" (-EAGAIN), "i" (-EFAULT)		\
58 	: "cc", "memory")
59 
60 #define __user_swp_asm(data, addr, res, temp) \
61 	__user_swpX_asm(data, addr, res, temp, "")
62 #define __user_swpb_asm(data, addr, res, temp) \
63 	__user_swpX_asm(data, addr, res, temp, "b")
64 
65 /*
66  * Macros/defines for extracting register numbers from instruction.
67  */
68 #define EXTRACT_REG_NUM(instruction, offset) \
69 	(((instruction) & (0xf << (offset))) >> (offset))
70 #define RN_OFFSET  16
71 #define RT_OFFSET  12
72 #define RT2_OFFSET  0
73 /*
74  * Bit 22 of the instruction encoding distinguishes between
75  * the SWP and SWPB variants (bit set means SWPB).
76  */
77 #define TYPE_SWPB (1 << 22)
78 
79 static unsigned long swpcounter;
80 static unsigned long swpbcounter;
81 static unsigned long abtcounter;
82 static pid_t         previous_pid;
83 
84 #ifdef CONFIG_PROC_FS
85 static int proc_status_show(struct seq_file *m, void *v)
86 {
87 	seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter);
88 	seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter);
89 	seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter);
90 	if (previous_pid != 0)
91 		seq_printf(m, "Last process:\t\t%d\n", previous_pid);
92 	return 0;
93 }
94 #endif
95 
96 /*
97  * Set up process info to signal segmentation fault - called on access error.
98  */
99 static void set_segfault(struct pt_regs *regs, unsigned long addr)
100 {
101 	int si_code;
102 
103 	down_read(&current->mm->mmap_sem);
104 	if (find_vma(current->mm, addr) == NULL)
105 		si_code = SEGV_MAPERR;
106 	else
107 		si_code = SEGV_ACCERR;
108 	up_read(&current->mm->mmap_sem);
109 
110 	pr_debug("SWP{B} emulation: access caused memory abort!\n");
111 	arm_notify_die("Illegal memory access", regs,
112 		       SIGSEGV, si_code,
113 		       (void __user *)instruction_pointer(regs),
114 		       0, 0);
115 
116 	abtcounter++;
117 }
118 
119 static int emulate_swpX(unsigned int address, unsigned int *data,
120 			unsigned int type)
121 {
122 	unsigned int res = 0;
123 
124 	if ((type != TYPE_SWPB) && (address & 0x3)) {
125 		/* SWP to unaligned address not permitted */
126 		pr_debug("SWP instruction on unaligned pointer!\n");
127 		return -EFAULT;
128 	}
129 
130 	while (1) {
131 		unsigned long temp;
132 		unsigned int __ua_flags;
133 
134 		__ua_flags = uaccess_save_and_enable();
135 		if (type == TYPE_SWPB)
136 			__user_swpb_asm(*data, address, res, temp);
137 		else
138 			__user_swp_asm(*data, address, res, temp);
139 		uaccess_restore(__ua_flags);
140 
141 		if (likely(res != -EAGAIN) || signal_pending(current))
142 			break;
143 
144 		cond_resched();
145 	}
146 
147 	if (res == 0) {
148 		if (type == TYPE_SWPB)
149 			swpbcounter++;
150 		else
151 			swpcounter++;
152 	}
153 
154 	return res;
155 }
156 
157 /*
158  * swp_handler logs the id of calling process, dissects the instruction, sanity
159  * checks the memory location, calls emulate_swpX for the actual operation and
160  * deals with fixup/error handling before returning
161  */
162 static int swp_handler(struct pt_regs *regs, unsigned int instr)
163 {
164 	unsigned int address, destreg, data, type;
165 	unsigned int res = 0;
166 
167 	perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc);
168 
169 	res = arm_check_condition(instr, regs->ARM_cpsr);
170 	switch (res) {
171 	case ARM_OPCODE_CONDTEST_PASS:
172 		break;
173 	case ARM_OPCODE_CONDTEST_FAIL:
174 		/* Condition failed - return to next instruction */
175 		regs->ARM_pc += 4;
176 		return 0;
177 	case ARM_OPCODE_CONDTEST_UNCOND:
178 		/* If unconditional encoding - not a SWP, undef */
179 		return -EFAULT;
180 	default:
181 		return -EINVAL;
182 	}
183 
184 	if (current->pid != previous_pid) {
185 		pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n",
186 			 current->comm, (unsigned long)current->pid);
187 		previous_pid = current->pid;
188 	}
189 
190 	address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)];
191 	data	= regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)];
192 	destreg = EXTRACT_REG_NUM(instr, RT_OFFSET);
193 
194 	type = instr & TYPE_SWPB;
195 
196 	pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n",
197 		 EXTRACT_REG_NUM(instr, RN_OFFSET), address,
198 		 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data);
199 
200 	/* Check access in reasonable access range for both SWP and SWPB */
201 	if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) {
202 		pr_debug("SWP{B} emulation: access to %p not allowed!\n",
203 			 (void *)address);
204 		res = -EFAULT;
205 	} else {
206 		res = emulate_swpX(address, &data, type);
207 	}
208 
209 	if (res == 0) {
210 		/*
211 		 * On successful emulation, revert the adjustment to the PC
212 		 * made in kernel/traps.c in order to resume execution at the
213 		 * instruction following the SWP{B}.
214 		 */
215 		regs->ARM_pc += 4;
216 		regs->uregs[destreg] = data;
217 	} else if (res == -EFAULT) {
218 		/*
219 		 * Memory errors do not mean emulation failed.
220 		 * Set up signal info to return SEGV, then return OK
221 		 */
222 		set_segfault(regs, address);
223 	}
224 
225 	return 0;
226 }
227 
228 /*
229  * Only emulate SWP/SWPB executed in ARM state/User mode.
230  * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE.
231  */
232 static struct undef_hook swp_hook = {
233 	.instr_mask = 0x0fb00ff0,
234 	.instr_val  = 0x01000090,
235 	.cpsr_mask  = MODE_MASK | PSR_T_BIT | PSR_J_BIT,
236 	.cpsr_val   = USR_MODE,
237 	.fn	    = swp_handler
238 };
239 
240 /*
241  * Register handler and create status file in /proc/cpu
242  * Invoked as late_initcall, since not needed before init spawned.
243  */
244 static int __init swp_emulation_init(void)
245 {
246 	if (cpu_architecture() < CPU_ARCH_ARMv7)
247 		return 0;
248 
249 #ifdef CONFIG_PROC_FS
250 	if (!proc_create_single("cpu/swp_emulation", S_IRUGO, NULL,
251 			proc_status_show))
252 		return -ENOMEM;
253 #endif /* CONFIG_PROC_FS */
254 
255 	pr_notice("Registering SWP/SWPB emulation handler\n");
256 	register_undef_hook(&swp_hook);
257 
258 	return 0;
259 }
260 
261 late_initcall(swp_emulation_init);
262