1 /* 2 * linux/arch/arm/kernel/swp_emulate.c 3 * 4 * Copyright (C) 2009 ARM Limited 5 * __user_* functions adapted from include/asm/uaccess.h 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Implements emulation of the SWP/SWPB instructions using load-exclusive and 12 * store-exclusive for processors that have them disabled (or future ones that 13 * might not implement them). 14 * 15 * Syntax of SWP{B} instruction: SWP{B}<c> <Rt>, <Rt2>, [<Rn>] 16 * Where: Rt = destination 17 * Rt2 = source 18 * Rn = address 19 */ 20 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/proc_fs.h> 24 #include <linux/seq_file.h> 25 #include <linux/sched.h> 26 #include <linux/syscalls.h> 27 #include <linux/perf_event.h> 28 29 #include <asm/opcodes.h> 30 #include <asm/traps.h> 31 #include <asm/uaccess.h> 32 33 /* 34 * Error-checking SWP macros implemented using ldrex{b}/strex{b} 35 */ 36 #define __user_swpX_asm(data, addr, res, temp, B) \ 37 __asm__ __volatile__( \ 38 " mov %2, %1\n" \ 39 "0: ldrex"B" %1, [%3]\n" \ 40 "1: strex"B" %0, %2, [%3]\n" \ 41 " cmp %0, #0\n" \ 42 " movne %0, %4\n" \ 43 "2:\n" \ 44 " .section .fixup,\"ax\"\n" \ 45 " .align 2\n" \ 46 "3: mov %0, %5\n" \ 47 " b 2b\n" \ 48 " .previous\n" \ 49 " .section __ex_table,\"a\"\n" \ 50 " .align 3\n" \ 51 " .long 0b, 3b\n" \ 52 " .long 1b, 3b\n" \ 53 " .previous" \ 54 : "=&r" (res), "+r" (data), "=&r" (temp) \ 55 : "r" (addr), "i" (-EAGAIN), "i" (-EFAULT) \ 56 : "cc", "memory") 57 58 #define __user_swp_asm(data, addr, res, temp) \ 59 __user_swpX_asm(data, addr, res, temp, "") 60 #define __user_swpb_asm(data, addr, res, temp) \ 61 __user_swpX_asm(data, addr, res, temp, "b") 62 63 /* 64 * Macros/defines for extracting register numbers from instruction. 65 */ 66 #define EXTRACT_REG_NUM(instruction, offset) \ 67 (((instruction) & (0xf << (offset))) >> (offset)) 68 #define RN_OFFSET 16 69 #define RT_OFFSET 12 70 #define RT2_OFFSET 0 71 /* 72 * Bit 22 of the instruction encoding distinguishes between 73 * the SWP and SWPB variants (bit set means SWPB). 74 */ 75 #define TYPE_SWPB (1 << 22) 76 77 static unsigned long swpcounter; 78 static unsigned long swpbcounter; 79 static unsigned long abtcounter; 80 static pid_t previous_pid; 81 82 #ifdef CONFIG_PROC_FS 83 static int proc_status_show(struct seq_file *m, void *v) 84 { 85 seq_printf(m, "Emulated SWP:\t\t%lu\n", swpcounter); 86 seq_printf(m, "Emulated SWPB:\t\t%lu\n", swpbcounter); 87 seq_printf(m, "Aborted SWP{B}:\t\t%lu\n", abtcounter); 88 if (previous_pid != 0) 89 seq_printf(m, "Last process:\t\t%d\n", previous_pid); 90 return 0; 91 } 92 93 static int proc_status_open(struct inode *inode, struct file *file) 94 { 95 return single_open(file, proc_status_show, PDE_DATA(inode)); 96 } 97 98 static const struct file_operations proc_status_fops = { 99 .open = proc_status_open, 100 .read = seq_read, 101 .llseek = seq_lseek, 102 .release = single_release, 103 }; 104 #endif 105 106 /* 107 * Set up process info to signal segmentation fault - called on access error. 108 */ 109 static void set_segfault(struct pt_regs *regs, unsigned long addr) 110 { 111 siginfo_t info; 112 113 down_read(¤t->mm->mmap_sem); 114 if (find_vma(current->mm, addr) == NULL) 115 info.si_code = SEGV_MAPERR; 116 else 117 info.si_code = SEGV_ACCERR; 118 up_read(¤t->mm->mmap_sem); 119 120 info.si_signo = SIGSEGV; 121 info.si_errno = 0; 122 info.si_addr = (void *) instruction_pointer(regs); 123 124 pr_debug("SWP{B} emulation: access caused memory abort!\n"); 125 arm_notify_die("Illegal memory access", regs, &info, 0, 0); 126 127 abtcounter++; 128 } 129 130 static int emulate_swpX(unsigned int address, unsigned int *data, 131 unsigned int type) 132 { 133 unsigned int res = 0; 134 135 if ((type != TYPE_SWPB) && (address & 0x3)) { 136 /* SWP to unaligned address not permitted */ 137 pr_debug("SWP instruction on unaligned pointer!\n"); 138 return -EFAULT; 139 } 140 141 while (1) { 142 unsigned long temp; 143 144 /* 145 * Barrier required between accessing protected resource and 146 * releasing a lock for it. Legacy code might not have done 147 * this, and we cannot determine that this is not the case 148 * being emulated, so insert always. 149 */ 150 smp_mb(); 151 152 if (type == TYPE_SWPB) 153 __user_swpb_asm(*data, address, res, temp); 154 else 155 __user_swp_asm(*data, address, res, temp); 156 157 if (likely(res != -EAGAIN) || signal_pending(current)) 158 break; 159 160 cond_resched(); 161 } 162 163 if (res == 0) { 164 /* 165 * Barrier also required between acquiring a lock for a 166 * protected resource and accessing the resource. Inserted for 167 * same reason as above. 168 */ 169 smp_mb(); 170 171 if (type == TYPE_SWPB) 172 swpbcounter++; 173 else 174 swpcounter++; 175 } 176 177 return res; 178 } 179 180 /* 181 * swp_handler logs the id of calling process, dissects the instruction, sanity 182 * checks the memory location, calls emulate_swpX for the actual operation and 183 * deals with fixup/error handling before returning 184 */ 185 static int swp_handler(struct pt_regs *regs, unsigned int instr) 186 { 187 unsigned int address, destreg, data, type; 188 unsigned int res = 0; 189 190 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, regs->ARM_pc); 191 192 res = arm_check_condition(instr, regs->ARM_cpsr); 193 switch (res) { 194 case ARM_OPCODE_CONDTEST_PASS: 195 break; 196 case ARM_OPCODE_CONDTEST_FAIL: 197 /* Condition failed - return to next instruction */ 198 regs->ARM_pc += 4; 199 return 0; 200 case ARM_OPCODE_CONDTEST_UNCOND: 201 /* If unconditional encoding - not a SWP, undef */ 202 return -EFAULT; 203 default: 204 return -EINVAL; 205 } 206 207 if (current->pid != previous_pid) { 208 pr_debug("\"%s\" (%ld) uses deprecated SWP{B} instruction\n", 209 current->comm, (unsigned long)current->pid); 210 previous_pid = current->pid; 211 } 212 213 address = regs->uregs[EXTRACT_REG_NUM(instr, RN_OFFSET)]; 214 data = regs->uregs[EXTRACT_REG_NUM(instr, RT2_OFFSET)]; 215 destreg = EXTRACT_REG_NUM(instr, RT_OFFSET); 216 217 type = instr & TYPE_SWPB; 218 219 pr_debug("addr in r%d->0x%08x, dest is r%d, source in r%d->0x%08x)\n", 220 EXTRACT_REG_NUM(instr, RN_OFFSET), address, 221 destreg, EXTRACT_REG_NUM(instr, RT2_OFFSET), data); 222 223 /* Check access in reasonable access range for both SWP and SWPB */ 224 if (!access_ok(VERIFY_WRITE, (address & ~3), 4)) { 225 pr_debug("SWP{B} emulation: access to %p not allowed!\n", 226 (void *)address); 227 res = -EFAULT; 228 } else { 229 res = emulate_swpX(address, &data, type); 230 } 231 232 if (res == 0) { 233 /* 234 * On successful emulation, revert the adjustment to the PC 235 * made in kernel/traps.c in order to resume execution at the 236 * instruction following the SWP{B}. 237 */ 238 regs->ARM_pc += 4; 239 regs->uregs[destreg] = data; 240 } else if (res == -EFAULT) { 241 /* 242 * Memory errors do not mean emulation failed. 243 * Set up signal info to return SEGV, then return OK 244 */ 245 set_segfault(regs, address); 246 } 247 248 return 0; 249 } 250 251 /* 252 * Only emulate SWP/SWPB executed in ARM state/User mode. 253 * The kernel must be SWP free and SWP{B} does not exist in Thumb/ThumbEE. 254 */ 255 static struct undef_hook swp_hook = { 256 .instr_mask = 0x0fb00ff0, 257 .instr_val = 0x01000090, 258 .cpsr_mask = MODE_MASK | PSR_T_BIT | PSR_J_BIT, 259 .cpsr_val = USR_MODE, 260 .fn = swp_handler 261 }; 262 263 /* 264 * Register handler and create status file in /proc/cpu 265 * Invoked as late_initcall, since not needed before init spawned. 266 */ 267 static int __init swp_emulation_init(void) 268 { 269 #ifdef CONFIG_PROC_FS 270 if (!proc_create("cpu/swp_emulation", S_IRUGO, NULL, &proc_status_fops)) 271 return -ENOMEM; 272 #endif /* CONFIG_PROC_FS */ 273 274 printk(KERN_NOTICE "Registering SWP/SWPB emulation handler\n"); 275 register_undef_hook(&swp_hook); 276 277 return 0; 278 } 279 280 late_initcall(swp_emulation_init); 281