1 /* 2 * linux/arch/arm/kernel/smp_twd.c 3 * 4 * Copyright (C) 2002 ARM Ltd. 5 * All Rights Reserved 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/delay.h> 14 #include <linux/device.h> 15 #include <linux/smp.h> 16 #include <linux/jiffies.h> 17 #include <linux/clockchips.h> 18 #include <linux/irq.h> 19 #include <linux/io.h> 20 21 #include <asm/smp_twd.h> 22 #include <asm/hardware/gic.h> 23 24 #define TWD_TIMER_LOAD 0x00 25 #define TWD_TIMER_COUNTER 0x04 26 #define TWD_TIMER_CONTROL 0x08 27 #define TWD_TIMER_INTSTAT 0x0C 28 29 #define TWD_WDOG_LOAD 0x20 30 #define TWD_WDOG_COUNTER 0x24 31 #define TWD_WDOG_CONTROL 0x28 32 #define TWD_WDOG_INTSTAT 0x2C 33 #define TWD_WDOG_RESETSTAT 0x30 34 #define TWD_WDOG_DISABLE 0x34 35 36 #define TWD_TIMER_CONTROL_ENABLE (1 << 0) 37 #define TWD_TIMER_CONTROL_ONESHOT (0 << 1) 38 #define TWD_TIMER_CONTROL_PERIODIC (1 << 1) 39 #define TWD_TIMER_CONTROL_IT_ENABLE (1 << 2) 40 41 /* set up by the platform code */ 42 void __iomem *twd_base; 43 44 static unsigned long twd_timer_rate; 45 46 static void twd_set_mode(enum clock_event_mode mode, 47 struct clock_event_device *clk) 48 { 49 unsigned long ctrl; 50 51 switch (mode) { 52 case CLOCK_EVT_MODE_PERIODIC: 53 /* timer load already set up */ 54 ctrl = TWD_TIMER_CONTROL_ENABLE | TWD_TIMER_CONTROL_IT_ENABLE 55 | TWD_TIMER_CONTROL_PERIODIC; 56 break; 57 case CLOCK_EVT_MODE_ONESHOT: 58 /* period set, and timer enabled in 'next_event' hook */ 59 ctrl = TWD_TIMER_CONTROL_IT_ENABLE | TWD_TIMER_CONTROL_ONESHOT; 60 break; 61 case CLOCK_EVT_MODE_UNUSED: 62 case CLOCK_EVT_MODE_SHUTDOWN: 63 default: 64 ctrl = 0; 65 } 66 67 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); 68 } 69 70 static int twd_set_next_event(unsigned long evt, 71 struct clock_event_device *unused) 72 { 73 unsigned long ctrl = __raw_readl(twd_base + TWD_TIMER_CONTROL); 74 75 ctrl |= TWD_TIMER_CONTROL_ENABLE; 76 77 __raw_writel(evt, twd_base + TWD_TIMER_COUNTER); 78 __raw_writel(ctrl, twd_base + TWD_TIMER_CONTROL); 79 80 return 0; 81 } 82 83 /* 84 * local_timer_ack: checks for a local timer interrupt. 85 * 86 * If a local timer interrupt has occurred, acknowledge and return 1. 87 * Otherwise, return 0. 88 */ 89 int twd_timer_ack(void) 90 { 91 if (__raw_readl(twd_base + TWD_TIMER_INTSTAT)) { 92 __raw_writel(1, twd_base + TWD_TIMER_INTSTAT); 93 return 1; 94 } 95 96 return 0; 97 } 98 99 static void __cpuinit twd_calibrate_rate(void) 100 { 101 unsigned long load, count; 102 u64 waitjiffies; 103 104 /* 105 * If this is the first time round, we need to work out how fast 106 * the timer ticks 107 */ 108 if (twd_timer_rate == 0) { 109 printk(KERN_INFO "Calibrating local timer... "); 110 111 /* Wait for a tick to start */ 112 waitjiffies = get_jiffies_64() + 1; 113 114 while (get_jiffies_64() < waitjiffies) 115 udelay(10); 116 117 /* OK, now the tick has started, let's get the timer going */ 118 waitjiffies += 5; 119 120 /* enable, no interrupt or reload */ 121 __raw_writel(0x1, twd_base + TWD_TIMER_CONTROL); 122 123 /* maximum value */ 124 __raw_writel(0xFFFFFFFFU, twd_base + TWD_TIMER_COUNTER); 125 126 while (get_jiffies_64() < waitjiffies) 127 udelay(10); 128 129 count = __raw_readl(twd_base + TWD_TIMER_COUNTER); 130 131 twd_timer_rate = (0xFFFFFFFFU - count) * (HZ / 5); 132 133 printk("%lu.%02luMHz.\n", twd_timer_rate / 1000000, 134 (twd_timer_rate / 100000) % 100); 135 } 136 137 load = twd_timer_rate / HZ; 138 139 __raw_writel(load, twd_base + TWD_TIMER_LOAD); 140 } 141 142 /* 143 * Setup the local clock events for a CPU. 144 */ 145 void __cpuinit twd_timer_setup(struct clock_event_device *clk) 146 { 147 unsigned long flags; 148 149 twd_calibrate_rate(); 150 151 clk->name = "local_timer"; 152 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 153 clk->rating = 350; 154 clk->set_mode = twd_set_mode; 155 clk->set_next_event = twd_set_next_event; 156 clk->shift = 20; 157 clk->mult = div_sc(twd_timer_rate, NSEC_PER_SEC, clk->shift); 158 clk->max_delta_ns = clockevent_delta2ns(0xffffffff, clk); 159 clk->min_delta_ns = clockevent_delta2ns(0xf, clk); 160 161 /* Make sure our local interrupt controller has this enabled */ 162 local_irq_save(flags); 163 irq_to_desc(clk->irq)->status |= IRQ_NOPROBE; 164 get_irq_chip(clk->irq)->unmask(clk->irq); 165 local_irq_restore(flags); 166 167 clockevents_register_device(clk); 168 } 169 170 #ifdef CONFIG_HOTPLUG_CPU 171 /* 172 * take a local timer down 173 */ 174 void twd_timer_stop(void) 175 { 176 __raw_writel(0, twd_base + TWD_TIMER_CONTROL); 177 } 178 #endif 179