1#include <linux/linkage.h> 2#include <linux/threads.h> 3#include <asm/asm-offsets.h> 4#include <asm/assembler.h> 5#include <asm/glue-cache.h> 6#include <asm/glue-proc.h> 7#include <asm/system.h> 8 .text 9 10/* 11 * Save CPU state for a suspend. This saves the CPU general purpose 12 * registers, and allocates space on the kernel stack to save the CPU 13 * specific registers and some other data for resume. 14 * r0 = suspend function arg0 15 * r1 = suspend function 16 */ 17ENTRY(__cpu_suspend) 18 stmfd sp!, {r4 - r11, lr} 19#ifdef MULTI_CPU 20 ldr r10, =processor 21 ldr r4, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state 22#else 23 ldr r4, =cpu_suspend_size 24#endif 25 mov r5, sp @ current virtual SP 26 add r4, r4, #12 @ Space for pgd, virt sp, phys resume fn 27 sub sp, sp, r4 @ allocate CPU state on stack 28 stmfd sp!, {r0, r1} @ save suspend func arg and pointer 29 add r0, sp, #8 @ save pointer to save block 30 mov r1, r4 @ size of save block 31 mov r2, r5 @ virtual SP 32 ldr r3, =sleep_save_sp 33#ifdef CONFIG_SMP 34 ALT_SMP(mrc p15, 0, lr, c0, c0, 5) 35 ALT_UP(mov lr, #0) 36 and lr, lr, #15 37 add r3, r3, lr, lsl #2 38#endif 39 bl __cpu_suspend_save 40 adr lr, BSYM(cpu_suspend_abort) 41 ldmfd sp!, {r0, pc} @ call suspend fn 42ENDPROC(__cpu_suspend) 43 .ltorg 44 45cpu_suspend_abort: 46 ldmia sp!, {r1 - r3} @ pop phys pgd, virt SP, phys resume fn 47 teq r0, #0 48 moveq r0, #1 @ force non-zero value 49 mov sp, r2 50 ldmfd sp!, {r4 - r11, pc} 51ENDPROC(cpu_suspend_abort) 52 53/* 54 * r0 = control register value 55 */ 56 .align 5 57 .pushsection .idmap.text,"ax" 58ENTRY(cpu_resume_mmu) 59 ldr r3, =cpu_resume_after_mmu 60 instr_sync 61 mcr p15, 0, r0, c1, c0, 0 @ turn on MMU, I-cache, etc 62 mrc p15, 0, r0, c0, c0, 0 @ read id reg 63 instr_sync 64 mov r0, r0 65 mov r0, r0 66 mov pc, r3 @ jump to virtual address 67ENDPROC(cpu_resume_mmu) 68 .popsection 69cpu_resume_after_mmu: 70 bl cpu_init @ restore the und/abt/irq banked regs 71 mov r0, #0 @ return zero on success 72 ldmfd sp!, {r4 - r11, pc} 73ENDPROC(cpu_resume_after_mmu) 74 75/* 76 * Note: Yes, part of the following code is located into the .data section. 77 * This is to allow sleep_save_sp to be accessed with a relative load 78 * while we can't rely on any MMU translation. We could have put 79 * sleep_save_sp in the .text section as well, but some setups might 80 * insist on it to be truly read-only. 81 */ 82 .data 83 .align 84ENTRY(cpu_resume) 85#ifdef CONFIG_SMP 86 adr r0, sleep_save_sp 87 ALT_SMP(mrc p15, 0, r1, c0, c0, 5) 88 ALT_UP(mov r1, #0) 89 and r1, r1, #15 90 ldr r0, [r0, r1, lsl #2] @ stack phys addr 91#else 92 ldr r0, sleep_save_sp @ stack phys addr 93#endif 94 setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off 95 @ load phys pgd, stack, resume fn 96 ARM( ldmia r0!, {r1, sp, pc} ) 97THUMB( ldmia r0!, {r1, r2, r3} ) 98THUMB( mov sp, r2 ) 99THUMB( bx r3 ) 100ENDPROC(cpu_resume) 101 102sleep_save_sp: 103 .rept CONFIG_NR_CPUS 104 .long 0 @ preserve stack phys ptr here 105 .endr 106