xref: /openbmc/linux/arch/arm/kernel/irq.c (revision f9a82c48)
1 /*
2  *  linux/arch/arm/kernel/irq.c
3  *
4  *  Copyright (C) 1992 Linus Torvalds
5  *  Modifications for ARM processor Copyright (C) 1995-2000 Russell King.
6  *
7  *  Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation.
8  *  Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and
9  *  Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>.
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License version 2 as
13  * published by the Free Software Foundation.
14  *
15  *  This file contains the code used by various IRQ handling routines:
16  *  asking for different IRQ's should be done through these routines
17  *  instead of just grabbing them. Thus setups with different IRQ numbers
18  *  shouldn't result in any weird surprises, and installing new handlers
19  *  should be easier.
20  *
21  *  IRQ's are in fact implemented a bit like signal handlers for the kernel.
22  *  Naturally it's not a 1:1 relation, but there are similarities.
23  */
24 #include <linux/kernel_stat.h>
25 #include <linux/signal.h>
26 #include <linux/ioport.h>
27 #include <linux/interrupt.h>
28 #include <linux/irq.h>
29 #include <linux/irqchip.h>
30 #include <linux/random.h>
31 #include <linux/smp.h>
32 #include <linux/init.h>
33 #include <linux/seq_file.h>
34 #include <linux/errno.h>
35 #include <linux/list.h>
36 #include <linux/kallsyms.h>
37 #include <linux/proc_fs.h>
38 #include <linux/export.h>
39 
40 #include <asm/hardware/cache-l2x0.h>
41 #include <asm/hardware/cache-uniphier.h>
42 #include <asm/outercache.h>
43 #include <asm/exception.h>
44 #include <asm/mach/arch.h>
45 #include <asm/mach/irq.h>
46 #include <asm/mach/time.h>
47 
48 unsigned long irq_err_count;
49 
50 int arch_show_interrupts(struct seq_file *p, int prec)
51 {
52 #ifdef CONFIG_FIQ
53 	show_fiq_list(p, prec);
54 #endif
55 #ifdef CONFIG_SMP
56 	show_ipi_list(p, prec);
57 #endif
58 	seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count);
59 	return 0;
60 }
61 
62 /*
63  * handle_IRQ handles all hardware IRQ's.  Decoded IRQs should
64  * not come via this function.  Instead, they should provide their
65  * own 'handler'.  Used by platform code implementing C-based 1st
66  * level decoding.
67  */
68 void handle_IRQ(unsigned int irq, struct pt_regs *regs)
69 {
70 	__handle_domain_irq(NULL, irq, false, regs);
71 }
72 
73 /*
74  * asm_do_IRQ is the interface to be used from assembly code.
75  */
76 asmlinkage void __exception_irq_entry
77 asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
78 {
79 	handle_IRQ(irq, regs);
80 }
81 
82 void __init init_IRQ(void)
83 {
84 	int ret;
85 
86 	if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq)
87 		irqchip_init();
88 	else
89 		machine_desc->init_irq();
90 
91 	if (IS_ENABLED(CONFIG_OF) && IS_ENABLED(CONFIG_CACHE_L2X0) &&
92 	    (machine_desc->l2c_aux_mask || machine_desc->l2c_aux_val)) {
93 		if (!outer_cache.write_sec)
94 			outer_cache.write_sec = machine_desc->l2c_write_sec;
95 		ret = l2x0_of_init(machine_desc->l2c_aux_val,
96 				   machine_desc->l2c_aux_mask);
97 		if (ret && ret != -ENODEV)
98 			pr_err("L2C: failed to init: %d\n", ret);
99 	}
100 
101 	uniphier_cache_init();
102 }
103 
104 #ifdef CONFIG_SPARSE_IRQ
105 int __init arch_probe_nr_irqs(void)
106 {
107 	nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS;
108 	return nr_irqs;
109 }
110 #endif
111