1 /* 2 * linux/arch/arm/kernel/irq.c 3 * 4 * Copyright (C) 1992 Linus Torvalds 5 * Modifications for ARM processor Copyright (C) 1995-2000 Russell King. 6 * 7 * Support for Dynamic Tick Timer Copyright (C) 2004-2005 Nokia Corporation. 8 * Dynamic Tick Timer written by Tony Lindgren <tony@atomide.com> and 9 * Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>. 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License version 2 as 13 * published by the Free Software Foundation. 14 * 15 * This file contains the code used by various IRQ handling routines: 16 * asking for different IRQ's should be done through these routines 17 * instead of just grabbing them. Thus setups with different IRQ numbers 18 * shouldn't result in any weird surprises, and installing new handlers 19 * should be easier. 20 * 21 * IRQ's are in fact implemented a bit like signal handlers for the kernel. 22 * Naturally it's not a 1:1 relation, but there are similarities. 23 */ 24 #include <linux/kernel_stat.h> 25 #include <linux/signal.h> 26 #include <linux/ioport.h> 27 #include <linux/interrupt.h> 28 #include <linux/irq.h> 29 #include <linux/irqchip.h> 30 #include <linux/random.h> 31 #include <linux/smp.h> 32 #include <linux/init.h> 33 #include <linux/seq_file.h> 34 #include <linux/errno.h> 35 #include <linux/list.h> 36 #include <linux/kallsyms.h> 37 #include <linux/proc_fs.h> 38 #include <linux/export.h> 39 40 #include <asm/exception.h> 41 #include <asm/mach/arch.h> 42 #include <asm/mach/irq.h> 43 #include <asm/mach/time.h> 44 45 unsigned long irq_err_count; 46 47 int arch_show_interrupts(struct seq_file *p, int prec) 48 { 49 #ifdef CONFIG_FIQ 50 show_fiq_list(p, prec); 51 #endif 52 #ifdef CONFIG_SMP 53 show_ipi_list(p, prec); 54 #endif 55 seq_printf(p, "%*s: %10lu\n", prec, "Err", irq_err_count); 56 return 0; 57 } 58 59 /* 60 * handle_IRQ handles all hardware IRQ's. Decoded IRQs should 61 * not come via this function. Instead, they should provide their 62 * own 'handler'. Used by platform code implementing C-based 1st 63 * level decoding. 64 */ 65 void handle_IRQ(unsigned int irq, struct pt_regs *regs) 66 { 67 struct pt_regs *old_regs = set_irq_regs(regs); 68 69 irq_enter(); 70 71 /* 72 * Some hardware gives randomly wrong interrupts. Rather 73 * than crashing, do something sensible. 74 */ 75 if (unlikely(irq >= nr_irqs)) { 76 if (printk_ratelimit()) 77 printk(KERN_WARNING "Bad IRQ%u\n", irq); 78 ack_bad_irq(irq); 79 } else { 80 generic_handle_irq(irq); 81 } 82 83 irq_exit(); 84 set_irq_regs(old_regs); 85 } 86 87 /* 88 * asm_do_IRQ is the interface to be used from assembly code. 89 */ 90 asmlinkage void __exception_irq_entry 91 asm_do_IRQ(unsigned int irq, struct pt_regs *regs) 92 { 93 handle_IRQ(irq, regs); 94 } 95 96 void set_irq_flags(unsigned int irq, unsigned int iflags) 97 { 98 unsigned long clr = 0, set = IRQ_NOREQUEST | IRQ_NOPROBE | IRQ_NOAUTOEN; 99 100 if (irq >= nr_irqs) { 101 printk(KERN_ERR "Trying to set irq flags for IRQ%d\n", irq); 102 return; 103 } 104 105 if (iflags & IRQF_VALID) 106 clr |= IRQ_NOREQUEST; 107 if (iflags & IRQF_PROBE) 108 clr |= IRQ_NOPROBE; 109 if (!(iflags & IRQF_NOAUTOEN)) 110 clr |= IRQ_NOAUTOEN; 111 /* Order is clear bits in "clr" then set bits in "set" */ 112 irq_modify_status(irq, clr, set & ~clr); 113 } 114 EXPORT_SYMBOL_GPL(set_irq_flags); 115 116 void __init init_IRQ(void) 117 { 118 if (IS_ENABLED(CONFIG_OF) && !machine_desc->init_irq) 119 irqchip_init(); 120 else 121 machine_desc->init_irq(); 122 } 123 124 #ifdef CONFIG_MULTI_IRQ_HANDLER 125 void __init set_handle_irq(void (*handle_irq)(struct pt_regs *)) 126 { 127 if (handle_arch_irq) 128 return; 129 130 handle_arch_irq = handle_irq; 131 } 132 #endif 133 134 #ifdef CONFIG_SPARSE_IRQ 135 int __init arch_probe_nr_irqs(void) 136 { 137 nr_irqs = machine_desc->nr_irqs ? machine_desc->nr_irqs : NR_IRQS; 138 return nr_irqs; 139 } 140 #endif 141 142 #ifdef CONFIG_HOTPLUG_CPU 143 144 static bool migrate_one_irq(struct irq_desc *desc) 145 { 146 struct irq_data *d = irq_desc_get_irq_data(desc); 147 const struct cpumask *affinity = d->affinity; 148 struct irq_chip *c; 149 bool ret = false; 150 151 /* 152 * If this is a per-CPU interrupt, or the affinity does not 153 * include this CPU, then we have nothing to do. 154 */ 155 if (irqd_is_per_cpu(d) || !cpumask_test_cpu(smp_processor_id(), affinity)) 156 return false; 157 158 if (cpumask_any_and(affinity, cpu_online_mask) >= nr_cpu_ids) { 159 affinity = cpu_online_mask; 160 ret = true; 161 } 162 163 c = irq_data_get_irq_chip(d); 164 if (!c->irq_set_affinity) 165 pr_debug("IRQ%u: unable to set affinity\n", d->irq); 166 else if (c->irq_set_affinity(d, affinity, true) == IRQ_SET_MASK_OK && ret) 167 cpumask_copy(d->affinity, affinity); 168 169 return ret; 170 } 171 172 /* 173 * The current CPU has been marked offline. Migrate IRQs off this CPU. 174 * If the affinity settings do not allow other CPUs, force them onto any 175 * available CPU. 176 * 177 * Note: we must iterate over all IRQs, whether they have an attached 178 * action structure or not, as we need to get chained interrupts too. 179 */ 180 void migrate_irqs(void) 181 { 182 unsigned int i; 183 struct irq_desc *desc; 184 unsigned long flags; 185 186 local_irq_save(flags); 187 188 for_each_irq_desc(i, desc) { 189 bool affinity_broken; 190 191 raw_spin_lock(&desc->lock); 192 affinity_broken = migrate_one_irq(desc); 193 raw_spin_unlock(&desc->lock); 194 195 if (affinity_broken && printk_ratelimit()) 196 pr_warning("IRQ%u no longer affine to CPU%u\n", i, 197 smp_processor_id()); 198 } 199 200 local_irq_restore(flags); 201 } 202 #endif /* CONFIG_HOTPLUG_CPU */ 203