11da177e4SLinus Torvalds/* 21da177e4SLinus Torvalds * linux/arch/arm/kernel/head.S 31da177e4SLinus Torvalds * 41da177e4SLinus Torvalds * Copyright (C) 1994-2002 Russell King 5e65f38edSRussell King * Copyright (c) 2003 ARM Limited 6e65f38edSRussell King * All Rights Reserved 71da177e4SLinus Torvalds * 81da177e4SLinus Torvalds * This program is free software; you can redistribute it and/or modify 91da177e4SLinus Torvalds * it under the terms of the GNU General Public License version 2 as 101da177e4SLinus Torvalds * published by the Free Software Foundation. 111da177e4SLinus Torvalds * 121da177e4SLinus Torvalds * Kernel startup code for all 32-bit CPUs 131da177e4SLinus Torvalds */ 141da177e4SLinus Torvalds#include <linux/linkage.h> 151da177e4SLinus Torvalds#include <linux/init.h> 161da177e4SLinus Torvalds 171da177e4SLinus Torvalds#include <asm/assembler.h> 181da177e4SLinus Torvalds#include <asm/domain.h> 191da177e4SLinus Torvalds#include <asm/ptrace.h> 20e6ae744dSSam Ravnborg#include <asm/asm-offsets.h> 21f09b9979SNicolas Pitre#include <asm/memory.h> 224f7a1812SRussell King#include <asm/thread_info.h> 231da177e4SLinus Torvalds#include <asm/system.h> 241da177e4SLinus Torvalds 25c293393fSJeremy Kerr#ifdef CONFIG_DEBUG_LL 26c293393fSJeremy Kerr#include <mach/debug-macro.S> 27c293393fSJeremy Kerr#endif 28c293393fSJeremy Kerr 29d4e1c889SLinus Walleij#if (PHYS_OFFSET & 0x001fffff) 30d4e1c889SLinus Walleij#error "PHYS_OFFSET must be at an even 2MiB boundary!" 31d4e1c889SLinus Walleij#endif 32d4e1c889SLinus Walleij 33f06b97ffSRussell King#define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET) 34f06b97ffSRussell King#define KERNEL_RAM_PADDR (PHYS_OFFSET + TEXT_OFFSET) 359d4f13e5SRussell King 369d20fdd5SBill Gatliff 371da177e4SLinus Torvalds/* 3837d07b72SNicolas Pitre * swapper_pg_dir is the virtual address of the initial page table. 39f06b97ffSRussell King * We place the page tables 16K below KERNEL_RAM_VADDR. Therefore, we must 40f06b97ffSRussell King * make sure that KERNEL_RAM_VADDR is correctly set. Currently, we expect 4137d07b72SNicolas Pitre * the least significant 16 bits to be 0x8000, but we could probably 42f06b97ffSRussell King * relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x4000. 431da177e4SLinus Torvalds */ 44f06b97ffSRussell King#if (KERNEL_RAM_VADDR & 0xffff) != 0x8000 45f06b97ffSRussell King#error KERNEL_RAM_VADDR must start at 0xXXXX8000 461da177e4SLinus Torvalds#endif 471da177e4SLinus Torvalds 481da177e4SLinus Torvalds .globl swapper_pg_dir 49f06b97ffSRussell King .equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000 501da177e4SLinus Torvalds 5137d07b72SNicolas Pitre .macro pgtbl, rd 52f06b97ffSRussell King ldr \rd, =(KERNEL_RAM_PADDR - 0x4000) 531da177e4SLinus Torvalds .endm 5437d07b72SNicolas Pitre 5537d07b72SNicolas Pitre#ifdef CONFIG_XIP_KERNEL 56e98ff7f6SNicolas Pitre#define KERNEL_START XIP_VIRT_ADDR(CONFIG_XIP_PHYS_ADDR) 57e98ff7f6SNicolas Pitre#define KERNEL_END _edata_loc 581da177e4SLinus Torvalds#else 59e98ff7f6SNicolas Pitre#define KERNEL_START KERNEL_RAM_VADDR 60e98ff7f6SNicolas Pitre#define KERNEL_END _end 611da177e4SLinus Torvalds#endif 621da177e4SLinus Torvalds 631da177e4SLinus Torvalds/* 641da177e4SLinus Torvalds * Kernel startup entry point. 651da177e4SLinus Torvalds * --------------------------- 661da177e4SLinus Torvalds * 671da177e4SLinus Torvalds * This is normally called from the decompressor code. The requirements 681da177e4SLinus Torvalds * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, 699d20fdd5SBill Gatliff * r1 = machine nr, r2 = atags pointer. 701da177e4SLinus Torvalds * 711da177e4SLinus Torvalds * This code is mostly position independent, so if you link the kernel at 721da177e4SLinus Torvalds * 0xc0008000, you call this at __pa(0xc0008000). 731da177e4SLinus Torvalds * 741da177e4SLinus Torvalds * See linux/arch/arm/tools/mach-types for the complete list of machine 751da177e4SLinus Torvalds * numbers for r1. 761da177e4SLinus Torvalds * 771da177e4SLinus Torvalds * We're trying to keep crap to a minimum; DO NOT add any machine specific 781da177e4SLinus Torvalds * crap here - that's what the boot loader (or in extreme, well justified 791da177e4SLinus Torvalds * circumstances, zImage) is for. 801da177e4SLinus Torvalds */ 812abc1c50STim Abbott __HEAD 821da177e4SLinus TorvaldsENTRY(stext) 83b86040a5SCatalin Marinas setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode 841da177e4SLinus Torvalds @ and irqs disabled 850f44ba1dSRussell King mrc p15, 0, r9, c0, c0 @ get processor id 861da177e4SLinus Torvalds bl __lookup_processor_type @ r5=procinfo r9=cpuid 871da177e4SLinus Torvalds movs r10, r5 @ invalid processor (r5=0)? 881da177e4SLinus Torvalds beq __error_p @ yes, error 'p' 891da177e4SLinus Torvalds bl __lookup_machine_type @ r5=machinfo 901da177e4SLinus Torvalds movs r8, r5 @ invalid machine (r5=0)? 911da177e4SLinus Torvalds beq __error_a @ yes, error 'a' 929d20fdd5SBill Gatliff bl __vet_atags 93f00ec48fSRussell King#ifdef CONFIG_SMP_ON_UP 94f00ec48fSRussell King bl __fixup_smp 95f00ec48fSRussell King#endif 961da177e4SLinus Torvalds bl __create_page_tables 971da177e4SLinus Torvalds 981da177e4SLinus Torvalds /* 991da177e4SLinus Torvalds * The following calls CPU specific code in a position independent 1001da177e4SLinus Torvalds * manner. See arch/arm/mm/proc-*.S for details. r10 = base of 1011da177e4SLinus Torvalds * xxx_proc_info structure selected by __lookup_machine_type 1021da177e4SLinus Torvalds * above. On return, the CPU will be ready for the MMU to be 1031da177e4SLinus Torvalds * turned on, and r0 will hold the CPU control register value. 1041da177e4SLinus Torvalds */ 105a4ae4134SRussell King ldr r13, =__mmap_switched @ address to jump to after 1061da177e4SLinus Torvalds @ mmu has been enabled 10700945010SRussell King adr lr, BSYM(1f) @ return (PIC) address 108b86040a5SCatalin Marinas ARM( add pc, r10, #PROCINFO_INITFUNC ) 109b86040a5SCatalin Marinas THUMB( add r12, r10, #PROCINFO_INITFUNC ) 110b86040a5SCatalin Marinas THUMB( mov pc, r12 ) 11100945010SRussell King1: b __enable_mmu 11293ed3970SCatalin MarinasENDPROC(stext) 113a4ae4134SRussell King .ltorg 1141da177e4SLinus Torvalds 1151da177e4SLinus Torvalds/* 1161da177e4SLinus Torvalds * Setup the initial page tables. We only setup the barest 1171da177e4SLinus Torvalds * amount which are required to get the kernel running, which 1181da177e4SLinus Torvalds * generally means mapping in the kernel code. 1191da177e4SLinus Torvalds * 1201da177e4SLinus Torvalds * r8 = machinfo 1211da177e4SLinus Torvalds * r9 = cpuid 1221da177e4SLinus Torvalds * r10 = procinfo 1231da177e4SLinus Torvalds * 1241da177e4SLinus Torvalds * Returns: 125786f1b73SRussell King * r0, r3, r5-r7 corrupted 1261da177e4SLinus Torvalds * r4 = physical page table address 1271da177e4SLinus Torvalds */ 1281da177e4SLinus Torvalds__create_page_tables: 12937d07b72SNicolas Pitre pgtbl r4 @ page table address 1301da177e4SLinus Torvalds 1311da177e4SLinus Torvalds /* 1321da177e4SLinus Torvalds * Clear the 16K level 1 swapper page table 1331da177e4SLinus Torvalds */ 1341da177e4SLinus Torvalds mov r0, r4 1351da177e4SLinus Torvalds mov r3, #0 1361da177e4SLinus Torvalds add r6, r0, #0x4000 1371da177e4SLinus Torvalds1: str r3, [r0], #4 1381da177e4SLinus Torvalds str r3, [r0], #4 1391da177e4SLinus Torvalds str r3, [r0], #4 1401da177e4SLinus Torvalds str r3, [r0], #4 1411da177e4SLinus Torvalds teq r0, r6 1421da177e4SLinus Torvalds bne 1b 1431da177e4SLinus Torvalds 1448799ee9fSRussell King ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags 1451da177e4SLinus Torvalds 1461da177e4SLinus Torvalds /* 147786f1b73SRussell King * Create identity mapping to cater for __enable_mmu. 148786f1b73SRussell King * This identity mapping will be removed by paging_init(). 1491da177e4SLinus Torvalds */ 150786f1b73SRussell King adr r0, __enable_mmu_loc 151786f1b73SRussell King ldmia r0, {r3, r5, r6} 152786f1b73SRussell King sub r0, r0, r3 @ virt->phys offset 153786f1b73SRussell King add r5, r5, r0 @ phys __enable_mmu 154786f1b73SRussell King add r6, r6, r0 @ phys __enable_mmu_end 155786f1b73SRussell King mov r5, r5, lsr #20 156786f1b73SRussell King mov r6, r6, lsr #20 157786f1b73SRussell King 158786f1b73SRussell King1: orr r3, r7, r5, lsl #20 @ flags + kernel base 159786f1b73SRussell King str r3, [r4, r5, lsl #2] @ identity mapping 160786f1b73SRussell King teq r5, r6 161786f1b73SRussell King addne r5, r5, #1 @ next section 162786f1b73SRussell King bne 1b 1631da177e4SLinus Torvalds 1641da177e4SLinus Torvalds /* 1651da177e4SLinus Torvalds * Now setup the pagetables for our kernel direct 1662552fc27SLennert Buytenhek * mapped region. 1671da177e4SLinus Torvalds */ 168786f1b73SRussell King mov r3, pc 169786f1b73SRussell King mov r3, r3, lsr #20 170786f1b73SRussell King orr r3, r7, r3, lsl #20 171e98ff7f6SNicolas Pitre add r0, r4, #(KERNEL_START & 0xff000000) >> 18 172e98ff7f6SNicolas Pitre str r3, [r0, #(KERNEL_START & 0x00f00000) >> 18]! 173e98ff7f6SNicolas Pitre ldr r6, =(KERNEL_END - 1) 174e98ff7f6SNicolas Pitre add r0, r0, #4 175e98ff7f6SNicolas Pitre add r6, r4, r6, lsr #18 176e98ff7f6SNicolas Pitre1: cmp r0, r6 177e98ff7f6SNicolas Pitre add r3, r3, #1 << 20 178e98ff7f6SNicolas Pitre strls r3, [r0], #4 179e98ff7f6SNicolas Pitre bls 1b 1801da177e4SLinus Torvalds 181ec3622d9SNicolas Pitre#ifdef CONFIG_XIP_KERNEL 182ec3622d9SNicolas Pitre /* 183ec3622d9SNicolas Pitre * Map some ram to cover our .data and .bss areas. 184ec3622d9SNicolas Pitre */ 185ec3622d9SNicolas Pitre orr r3, r7, #(KERNEL_RAM_PADDR & 0xff000000) 18640435792SNicolas Pitre .if (KERNEL_RAM_PADDR & 0x00f00000) 187ec3622d9SNicolas Pitre orr r3, r3, #(KERNEL_RAM_PADDR & 0x00f00000) 18840435792SNicolas Pitre .endif 189ec3622d9SNicolas Pitre add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18 190ec3622d9SNicolas Pitre str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]! 191ec3622d9SNicolas Pitre ldr r6, =(_end - 1) 192ec3622d9SNicolas Pitre add r0, r0, #4 193ec3622d9SNicolas Pitre add r6, r4, r6, lsr #18 194ec3622d9SNicolas Pitre1: cmp r0, r6 195ec3622d9SNicolas Pitre add r3, r3, #1 << 20 196ec3622d9SNicolas Pitre strls r3, [r0], #4 197ec3622d9SNicolas Pitre bls 1b 198ec3622d9SNicolas Pitre#endif 199ec3622d9SNicolas Pitre 2001da177e4SLinus Torvalds /* 2011da177e4SLinus Torvalds * Then map first 1MB of ram in case it contains our boot params. 2021da177e4SLinus Torvalds */ 203f09b9979SNicolas Pitre add r0, r4, #PAGE_OFFSET >> 18 204d4e1c889SLinus Walleij orr r6, r7, #(PHYS_OFFSET & 0xff000000) 20540435792SNicolas Pitre .if (PHYS_OFFSET & 0x00f00000) 20640435792SNicolas Pitre orr r6, r6, #(PHYS_OFFSET & 0x00f00000) 20740435792SNicolas Pitre .endif 2081da177e4SLinus Torvalds str r6, [r0] 2091da177e4SLinus Torvalds 210c77b0427SRussell King#ifdef CONFIG_DEBUG_LL 211c293393fSJeremy Kerr#ifndef CONFIG_DEBUG_ICEDCC 2121da177e4SLinus Torvalds /* 2131da177e4SLinus Torvalds * Map in IO space for serial debugging. 2141da177e4SLinus Torvalds * This allows debug messages to be output 2151da177e4SLinus Torvalds * via a serial console before paging_init. 2161da177e4SLinus Torvalds */ 217c293393fSJeremy Kerr addruart r7, r3 218c293393fSJeremy Kerr 219c293393fSJeremy Kerr mov r3, r3, lsr #20 220c293393fSJeremy Kerr mov r3, r3, lsl #2 221c293393fSJeremy Kerr 2221da177e4SLinus Torvalds add r0, r4, r3 2231da177e4SLinus Torvalds rsb r3, r3, #0x4000 @ PTRS_PER_PGD*sizeof(long) 2241da177e4SLinus Torvalds cmp r3, #0x0800 @ limit to 512MB 2251da177e4SLinus Torvalds movhi r3, #0x0800 2261da177e4SLinus Torvalds add r6, r0, r3 227c293393fSJeremy Kerr mov r3, r7, lsr #20 228c293393fSJeremy Kerr ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags 229c293393fSJeremy Kerr orr r3, r7, r3, lsl #20 2301da177e4SLinus Torvalds1: str r3, [r0], #4 2311da177e4SLinus Torvalds add r3, r3, #1 << 20 2321da177e4SLinus Torvalds teq r0, r6 2331da177e4SLinus Torvalds bne 1b 234c293393fSJeremy Kerr 235c293393fSJeremy Kerr#else /* CONFIG_DEBUG_ICEDCC */ 236c293393fSJeremy Kerr /* we don't need any serial debugging mappings for ICEDCC */ 237c293393fSJeremy Kerr ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags 238c293393fSJeremy Kerr#endif /* !CONFIG_DEBUG_ICEDCC */ 239c293393fSJeremy Kerr 2401da177e4SLinus Torvalds#if defined(CONFIG_ARCH_NETWINDER) || defined(CONFIG_ARCH_CATS) 2411da177e4SLinus Torvalds /* 2423c0bdac3SRussell King * If we're using the NetWinder or CATS, we also need to map 2433c0bdac3SRussell King * in the 16550-type serial port for the debug messages 2441da177e4SLinus Torvalds */ 245c77b0427SRussell King add r0, r4, #0xff000000 >> 18 246c77b0427SRussell King orr r3, r7, #0x7c000000 247c77b0427SRussell King str r3, [r0] 2481da177e4SLinus Torvalds#endif 2491da177e4SLinus Torvalds#ifdef CONFIG_ARCH_RPC 2501da177e4SLinus Torvalds /* 2511da177e4SLinus Torvalds * Map in screen at 0x02000000 & SCREEN2_BASE 2521da177e4SLinus Torvalds * Similar reasons here - for debug. This is 2531da177e4SLinus Torvalds * only for Acorn RiscPC architectures. 2541da177e4SLinus Torvalds */ 255c77b0427SRussell King add r0, r4, #0x02000000 >> 18 256c77b0427SRussell King orr r3, r7, #0x02000000 2571da177e4SLinus Torvalds str r3, [r0] 258c77b0427SRussell King add r0, r4, #0xd8000000 >> 18 2591da177e4SLinus Torvalds str r3, [r0] 2601da177e4SLinus Torvalds#endif 261c77b0427SRussell King#endif 2621da177e4SLinus Torvalds mov pc, lr 26393ed3970SCatalin MarinasENDPROC(__create_page_tables) 2641da177e4SLinus Torvalds .ltorg 265786f1b73SRussell King__enable_mmu_loc: 266786f1b73SRussell King .long . 267786f1b73SRussell King .long __enable_mmu 268786f1b73SRussell King .long __enable_mmu_end 2691da177e4SLinus Torvalds 27000945010SRussell King#if defined(CONFIG_SMP) 27100945010SRussell King __CPUINIT 27200945010SRussell KingENTRY(secondary_startup) 27300945010SRussell King /* 27400945010SRussell King * Common entry point for secondary CPUs. 27500945010SRussell King * 27600945010SRussell King * Ensure that we're in SVC mode, and IRQs are disabled. Lookup 27700945010SRussell King * the processor type - there is no need to check the machine type 27800945010SRussell King * as it has already been validated by the primary processor. 27900945010SRussell King */ 28000945010SRussell King setmode PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 28100945010SRussell King mrc p15, 0, r9, c0, c0 @ get processor id 28200945010SRussell King bl __lookup_processor_type 28300945010SRussell King movs r10, r5 @ invalid processor? 28400945010SRussell King moveq r0, #'p' @ yes, error 'p' 28500945010SRussell King beq __error_p 28600945010SRussell King 28700945010SRussell King /* 28800945010SRussell King * Use the page tables supplied from __cpu_up. 28900945010SRussell King */ 29000945010SRussell King adr r4, __secondary_data 29100945010SRussell King ldmia r4, {r5, r7, r12} @ address to jump to after 29200945010SRussell King sub r4, r4, r5 @ mmu has been enabled 29300945010SRussell King ldr r4, [r7, r4] @ get secondary_data.pgdir 29400945010SRussell King adr lr, BSYM(__enable_mmu) @ return address 29500945010SRussell King mov r13, r12 @ __secondary_switched address 29600945010SRussell King ARM( add pc, r10, #PROCINFO_INITFUNC ) @ initialise processor 29700945010SRussell King @ (return control reg) 29800945010SRussell King THUMB( add r12, r10, #PROCINFO_INITFUNC ) 29900945010SRussell King THUMB( mov pc, r12 ) 30000945010SRussell KingENDPROC(secondary_startup) 30100945010SRussell King 30200945010SRussell King /* 30300945010SRussell King * r6 = &secondary_data 30400945010SRussell King */ 30500945010SRussell KingENTRY(__secondary_switched) 30600945010SRussell King ldr sp, [r7, #4] @ get secondary_data.stack 30700945010SRussell King mov fp, #0 30800945010SRussell King b secondary_start_kernel 30900945010SRussell KingENDPROC(__secondary_switched) 31000945010SRussell King 31100945010SRussell King .type __secondary_data, %object 31200945010SRussell King__secondary_data: 31300945010SRussell King .long . 31400945010SRussell King .long secondary_data 31500945010SRussell King .long __secondary_switched 31600945010SRussell King#endif /* defined(CONFIG_SMP) */ 31700945010SRussell King 31800945010SRussell King 31900945010SRussell King 32000945010SRussell King/* 32100945010SRussell King * Setup common bits before finally enabling the MMU. Essentially 32200945010SRussell King * this is just loading the page table pointer and domain access 32300945010SRussell King * registers. 324865a4faeSRussell King * 325865a4faeSRussell King * r0 = cp#15 control register 326865a4faeSRussell King * r1 = machine ID 327865a4faeSRussell King * r2 = atags pointer 328865a4faeSRussell King * r4 = page table pointer 329865a4faeSRussell King * r9 = processor ID 330865a4faeSRussell King * r13 = *virtual* address to jump to upon completion 33100945010SRussell King */ 33200945010SRussell King__enable_mmu: 33300945010SRussell King#ifdef CONFIG_ALIGNMENT_TRAP 33400945010SRussell King orr r0, r0, #CR_A 33500945010SRussell King#else 33600945010SRussell King bic r0, r0, #CR_A 33700945010SRussell King#endif 33800945010SRussell King#ifdef CONFIG_CPU_DCACHE_DISABLE 33900945010SRussell King bic r0, r0, #CR_C 34000945010SRussell King#endif 34100945010SRussell King#ifdef CONFIG_CPU_BPREDICT_DISABLE 34200945010SRussell King bic r0, r0, #CR_Z 34300945010SRussell King#endif 34400945010SRussell King#ifdef CONFIG_CPU_ICACHE_DISABLE 34500945010SRussell King bic r0, r0, #CR_I 34600945010SRussell King#endif 34700945010SRussell King mov r5, #(domain_val(DOMAIN_USER, DOMAIN_MANAGER) | \ 34800945010SRussell King domain_val(DOMAIN_KERNEL, DOMAIN_MANAGER) | \ 34900945010SRussell King domain_val(DOMAIN_TABLE, DOMAIN_MANAGER) | \ 35000945010SRussell King domain_val(DOMAIN_IO, DOMAIN_CLIENT)) 35100945010SRussell King mcr p15, 0, r5, c3, c0, 0 @ load domain access register 35200945010SRussell King mcr p15, 0, r4, c2, c0, 0 @ load page table pointer 35300945010SRussell King b __turn_mmu_on 35400945010SRussell KingENDPROC(__enable_mmu) 35500945010SRussell King 35600945010SRussell King/* 35700945010SRussell King * Enable the MMU. This completely changes the structure of the visible 35800945010SRussell King * memory space. You will not be able to trace execution through this. 35900945010SRussell King * If you have an enquiry about this, *please* check the linux-arm-kernel 36000945010SRussell King * mailing list archives BEFORE sending another post to the list. 36100945010SRussell King * 36200945010SRussell King * r0 = cp#15 control register 363865a4faeSRussell King * r1 = machine ID 364865a4faeSRussell King * r2 = atags pointer 365865a4faeSRussell King * r9 = processor ID 36600945010SRussell King * r13 = *virtual* address to jump to upon completion 36700945010SRussell King * 36800945010SRussell King * other registers depend on the function called upon completion 36900945010SRussell King */ 37000945010SRussell King .align 5 37100945010SRussell King__turn_mmu_on: 37200945010SRussell King mov r0, r0 37300945010SRussell King mcr p15, 0, r0, c1, c0, 0 @ write control reg 37400945010SRussell King mrc p15, 0, r3, c0, c0, 0 @ read id reg 37500945010SRussell King mov r3, r3 37600945010SRussell King mov r3, r13 37700945010SRussell King mov pc, r3 37800945010SRussell King__enable_mmu_end: 37900945010SRussell KingENDPROC(__turn_mmu_on) 38000945010SRussell King 3811da177e4SLinus Torvalds 382f00ec48fSRussell King#ifdef CONFIG_SMP_ON_UP 383f00ec48fSRussell King__fixup_smp: 384f00ec48fSRussell King mov r7, #0x00070000 385f00ec48fSRussell King orr r6, r7, #0xff000000 @ mask 0xff070000 386f00ec48fSRussell King orr r7, r7, #0x41000000 @ val 0x41070000 387f00ec48fSRussell King and r0, r9, r6 388f00ec48fSRussell King teq r0, r7 @ ARM CPU and ARMv6/v7? 389f00ec48fSRussell King bne __fixup_smp_on_up @ no, assume UP 390f00ec48fSRussell King 391f00ec48fSRussell King orr r6, r6, #0x0000ff00 392f00ec48fSRussell King orr r6, r6, #0x000000f0 @ mask 0xff07fff0 393f00ec48fSRussell King orr r7, r7, #0x0000b000 394f00ec48fSRussell King orr r7, r7, #0x00000020 @ val 0x4107b020 395f00ec48fSRussell King and r0, r9, r6 396f00ec48fSRussell King teq r0, r7 @ ARM 11MPCore? 397f00ec48fSRussell King moveq pc, lr @ yes, assume SMP 398f00ec48fSRussell King 399f00ec48fSRussell King mrc p15, 0, r0, c0, c0, 5 @ read MPIDR 400f00ec48fSRussell King tst r0, #1 << 31 401f00ec48fSRussell King movne pc, lr @ bit 31 => SMP 402f00ec48fSRussell King 403f00ec48fSRussell King__fixup_smp_on_up: 404f00ec48fSRussell King adr r0, 1f 405f00ec48fSRussell King ldmia r0, {r3, r6, r7} 406f00ec48fSRussell King sub r3, r0, r3 407f00ec48fSRussell King add r6, r6, r3 408f00ec48fSRussell King add r7, r7, r3 409f00ec48fSRussell King2: cmp r6, r7 410f00ec48fSRussell King ldmia r6!, {r0, r4} 411f00ec48fSRussell King strlo r4, [r0, r3] 412f00ec48fSRussell King blo 2b 413f00ec48fSRussell King mov pc, lr 414f00ec48fSRussell KingENDPROC(__fixup_smp) 415f00ec48fSRussell King 416f00ec48fSRussell King1: .word . 417f00ec48fSRussell King .word __smpalt_begin 418f00ec48fSRussell King .word __smpalt_end 419f00ec48fSRussell King 420f00ec48fSRussell King .pushsection .data 421f00ec48fSRussell King .globl smp_on_up 422f00ec48fSRussell Kingsmp_on_up: 423f00ec48fSRussell King ALT_SMP(.long 1) 424f00ec48fSRussell King ALT_UP(.long 0) 425f00ec48fSRussell King .popsection 426f00ec48fSRussell King 427f00ec48fSRussell King#endif 428f00ec48fSRussell King 42975d90832SHyok S. Choi#include "head-common.S" 430