xref: /openbmc/linux/arch/arm/kernel/head-nommu.S (revision baa7eb025ab14f3cba2e35c0a8648f9c9f01d24f)
1/*
2 *  linux/arch/arm/kernel/head-nommu.S
3 *
4 *  Copyright (C) 1994-2002 Russell King
5 *  Copyright (C) 2003-2006 Hyok S. Choi
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 *  Common kernel startup code (non-paged MM)
12 *
13 */
14#include <linux/linkage.h>
15#include <linux/init.h>
16
17#include <asm/assembler.h>
18#include <asm/ptrace.h>
19#include <asm/asm-offsets.h>
20#include <asm/thread_info.h>
21#include <asm/system.h>
22
23/*
24 * Kernel startup entry point.
25 * ---------------------------
26 *
27 * This is normally called from the decompressor code.  The requirements
28 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0,
29 * r1 = machine nr.
30 *
31 * See linux/arch/arm/tools/mach-types for the complete list of machine
32 * numbers for r1.
33 *
34 */
35	__HEAD
36ENTRY(stext)
37	setmode	PSR_F_BIT | PSR_I_BIT | SVC_MODE, r9 @ ensure svc mode
38						@ and irqs disabled
39#ifndef CONFIG_CPU_CP15
40	ldr	r9, =CONFIG_PROCESSOR_ID
41#else
42	mrc	p15, 0, r9, c0, c0		@ get processor id
43#endif
44	bl	__lookup_processor_type		@ r5=procinfo r9=cpuid
45	movs	r10, r5				@ invalid processor (r5=0)?
46	beq	__error_p				@ yes, error 'p'
47	bl	__lookup_machine_type		@ r5=machinfo
48	movs	r8, r5				@ invalid machine (r5=0)?
49	beq	__error_a			@ yes, error 'a'
50
51	adr	lr, BSYM(__after_proc_init)	@ return (PIC) address
52 ARM(	add	pc, r10, #PROCINFO_INITFUNC	)
53 THUMB(	add	r12, r10, #PROCINFO_INITFUNC	)
54 THUMB(	mov	pc, r12				)
55ENDPROC(stext)
56
57/*
58 * Set the Control Register and Read the process ID.
59 */
60__after_proc_init:
61#ifdef CONFIG_CPU_CP15
62	/*
63	 * CP15 system control register value returned in r0 from
64	 * the CPU init function.
65	 */
66#ifdef CONFIG_ALIGNMENT_TRAP
67	orr	r0, r0, #CR_A
68#else
69	bic	r0, r0, #CR_A
70#endif
71#ifdef CONFIG_CPU_DCACHE_DISABLE
72	bic	r0, r0, #CR_C
73#endif
74#ifdef CONFIG_CPU_BPREDICT_DISABLE
75	bic	r0, r0, #CR_Z
76#endif
77#ifdef CONFIG_CPU_ICACHE_DISABLE
78	bic	r0, r0, #CR_I
79#endif
80#ifdef CONFIG_CPU_HIGH_VECTOR
81	orr	r0, r0, #CR_V
82#else
83	bic	r0, r0, #CR_V
84#endif
85	mcr	p15, 0, r0, c1, c0, 0		@ write control reg
86#endif /* CONFIG_CPU_CP15 */
87
88	b	__mmap_switched			@ clear the BSS and jump
89						@ to start_kernel
90ENDPROC(__after_proc_init)
91	.ltorg
92
93#include "head-common.S"
94