1/* 2 * linux/arch/arm/kernel/head-nommu.S 3 * 4 * Copyright (C) 1994-2002 Russell King 5 * Copyright (C) 2003-2006 Hyok S. Choi 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Common kernel startup code (non-paged MM) 12 * for 32-bit CPUs which has a process ID register(CP15). 13 * 14 */ 15#include <linux/config.h> 16#include <linux/linkage.h> 17#include <linux/init.h> 18 19#include <asm/assembler.h> 20#include <asm/mach-types.h> 21#include <asm/procinfo.h> 22#include <asm/ptrace.h> 23#include <asm/asm-offsets.h> 24#include <asm/thread_info.h> 25#include <asm/system.h> 26 27/* 28 * Kernel startup entry point. 29 * --------------------------- 30 * 31 * This is normally called from the decompressor code. The requirements 32 * are: MMU = off, D-cache = off, I-cache = dont care, r0 = 0, 33 * r1 = machine nr. 34 * 35 * See linux/arch/arm/tools/mach-types for the complete list of machine 36 * numbers for r1. 37 * 38 */ 39 __INIT 40 .type stext, %function 41ENTRY(stext) 42 msr cpsr_c, #PSR_F_BIT | PSR_I_BIT | MODE_SVC @ ensure svc mode 43 @ and irqs disabled 44 mrc p15, 0, r9, c0, c0 @ get processor id 45 bl __lookup_processor_type @ r5=procinfo r9=cpuid 46 movs r10, r5 @ invalid processor (r5=0)? 47 beq __error_p @ yes, error 'p' 48 bl __lookup_machine_type @ r5=machinfo 49 movs r8, r5 @ invalid machine (r5=0)? 50 beq __error_a @ yes, error 'a' 51 52 ldr r13, __switch_data @ address to jump to after 53 @ the initialization is done 54 adr lr, __after_proc_init @ return (PIC) address 55 add pc, r10, #PROCINFO_INITFUNC 56 57/* 58 * Set the Control Register and Read the process ID. 59 */ 60 .type __after_proc_init, %function 61__after_proc_init: 62 mrc p15, 0, r0, c1, c0, 0 @ read control reg 63#ifdef CONFIG_ALIGNMENT_TRAP 64 orr r0, r0, #CR_A 65#else 66 bic r0, r0, #CR_A 67#endif 68#ifdef CONFIG_CPU_DCACHE_DISABLE 69 bic r0, r0, #CR_C 70#endif 71#ifdef CONFIG_CPU_BPREDICT_DISABLE 72 bic r0, r0, #CR_Z 73#endif 74#ifdef CONFIG_CPU_ICACHE_DISABLE 75 bic r0, r0, #CR_I 76#endif 77 mcr p15, 0, r0, c1, c0, 0 @ write control reg 78 79 mov pc, r13 @ clear the BSS and jump 80 @ to start_kernel 81 .ltorg 82 83#include "head-common.S" 84