1/* 2 * linux/arch/arm/kernel/head-common.S 3 * 4 * Copyright (C) 1994-2002 Russell King 5 * Copyright (c) 2003 ARM Limited 6 * All Rights Reserved 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 */ 13 14#define ATAG_CORE 0x54410001 15#define ATAG_CORE_SIZE ((2*4 + 3*4) >> 2) 16 17 .align 2 18 .type __switch_data, %object 19__switch_data: 20 .long __mmap_switched 21 .long __data_loc @ r4 22 .long _data @ r5 23 .long __bss_start @ r6 24 .long _end @ r7 25 .long processor_id @ r4 26 .long __machine_arch_type @ r5 27 .long __atags_pointer @ r6 28 .long cr_alignment @ r7 29 .long init_thread_union + THREAD_START_SP @ sp 30 31/* 32 * The following fragment of code is executed with the MMU on in MMU mode, 33 * and uses absolute addresses; this is not position independent. 34 * 35 * r0 = cp#15 control register 36 * r1 = machine ID 37 * r2 = atags pointer 38 * r9 = processor ID 39 */ 40__mmap_switched: 41 adr r3, __switch_data + 4 42 43 ldmia r3!, {r4, r5, r6, r7} 44 cmp r4, r5 @ Copy data segment if needed 451: cmpne r5, r6 46 ldrne fp, [r4], #4 47 strne fp, [r5], #4 48 bne 1b 49 50 mov fp, #0 @ Clear BSS (and zero fp) 511: cmp r6, r7 52 strcc fp, [r6],#4 53 bcc 1b 54 55 ARM( ldmia r3, {r4, r5, r6, r7, sp}) 56 THUMB( ldmia r3, {r4, r5, r6, r7} ) 57 THUMB( ldr sp, [r3, #16] ) 58 str r9, [r4] @ Save processor ID 59 str r1, [r5] @ Save machine type 60 str r2, [r6] @ Save atags pointer 61 bic r4, r0, #CR_A @ Clear 'A' bit 62 stmia r7, {r0, r4} @ Save control register values 63 b start_kernel 64ENDPROC(__mmap_switched) 65 66/* 67 * Exception handling. Something went wrong and we can't proceed. We 68 * ought to tell the user, but since we don't have any guarantee that 69 * we're even running on the right architecture, we do virtually nothing. 70 * 71 * If CONFIG_DEBUG_LL is set we try to print out something about the error 72 * and hope for the best (useful if bootloader fails to pass a proper 73 * machine ID for example). 74 */ 75__error_p: 76#ifdef CONFIG_DEBUG_LL 77 adr r0, str_p1 78 bl printascii 79 mov r0, r9 80 bl printhex8 81 adr r0, str_p2 82 bl printascii 83 b __error 84str_p1: .asciz "\nError: unrecognized/unsupported processor variant (0x" 85str_p2: .asciz ").\n" 86 .align 87#endif 88ENDPROC(__error_p) 89 90__error_a: 91#ifdef CONFIG_DEBUG_LL 92 mov r4, r1 @ preserve machine ID 93 adr r0, str_a1 94 bl printascii 95 mov r0, r4 96 bl printhex8 97 adr r0, str_a2 98 bl printascii 99 adr r3, 3f 100 ldmia r3, {r4, r5, r6} @ get machine desc list 101 sub r4, r3, r4 @ get offset between virt&phys 102 add r5, r5, r4 @ convert virt addresses to 103 add r6, r6, r4 @ physical address space 1041: ldr r0, [r5, #MACHINFO_TYPE] @ get machine type 105 bl printhex8 106 mov r0, #'\t' 107 bl printch 108 ldr r0, [r5, #MACHINFO_NAME] @ get machine name 109 add r0, r0, r4 110 bl printascii 111 mov r0, #'\n' 112 bl printch 113 add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc 114 cmp r5, r6 115 blo 1b 116 adr r0, str_a3 117 bl printascii 118 b __error 119ENDPROC(__error_a) 120 121str_a1: .asciz "\nError: unrecognized/unsupported machine ID (r1 = 0x" 122str_a2: .asciz ").\n\nAvailable machine support:\n\nID (hex)\tNAME\n" 123str_a3: .asciz "\nPlease check your kernel config and/or bootloader.\n" 124 .align 125#endif 126 127__error: 128#ifdef CONFIG_ARCH_RPC 129/* 130 * Turn the screen red on a error - RiscPC only. 131 */ 132 mov r0, #0x02000000 133 mov r3, #0x11 134 orr r3, r3, r3, lsl #8 135 orr r3, r3, r3, lsl #16 136 str r3, [r0], #4 137 str r3, [r0], #4 138 str r3, [r0], #4 139 str r3, [r0], #4 140#endif 1411: mov r0, r0 142 b 1b 143ENDPROC(__error) 144 145 146/* 147 * Read processor ID register (CP#15, CR0), and look up in the linker-built 148 * supported processor list. Note that we can't use the absolute addresses 149 * for the __proc_info lists since we aren't running with the MMU on 150 * (and therefore, we are not in the correct address space). We have to 151 * calculate the offset. 152 * 153 * r9 = cpuid 154 * Returns: 155 * r3, r4, r6 corrupted 156 * r5 = proc_info pointer in physical address space 157 * r9 = cpuid (preserved) 158 */ 159__lookup_processor_type: 160 adr r3, 3f 161 ldmia r3, {r5 - r7} 162 add r3, r3, #8 163 sub r3, r3, r7 @ get offset between virt&phys 164 add r5, r5, r3 @ convert virt addresses to 165 add r6, r6, r3 @ physical address space 1661: ldmia r5, {r3, r4} @ value, mask 167 and r4, r4, r9 @ mask wanted bits 168 teq r3, r4 169 beq 2f 170 add r5, r5, #PROC_INFO_SZ @ sizeof(proc_info_list) 171 cmp r5, r6 172 blo 1b 173 mov r5, #0 @ unknown processor 1742: mov pc, lr 175ENDPROC(__lookup_processor_type) 176 177/* 178 * This provides a C-API version of the above function. 179 */ 180ENTRY(lookup_processor_type) 181 stmfd sp!, {r4 - r7, r9, lr} 182 mov r9, r0 183 bl __lookup_processor_type 184 mov r0, r5 185 ldmfd sp!, {r4 - r7, r9, pc} 186ENDPROC(lookup_processor_type) 187 188/* 189 * Look in <asm/procinfo.h> and arch/arm/kernel/arch.[ch] for 190 * more information about the __proc_info and __arch_info structures. 191 */ 192 .align 2 1933: .long __proc_info_begin 194 .long __proc_info_end 1954: .long . 196 .long __arch_info_begin 197 .long __arch_info_end 198 199/* 200 * Lookup machine architecture in the linker-build list of architectures. 201 * Note that we can't use the absolute addresses for the __arch_info 202 * lists since we aren't running with the MMU on (and therefore, we are 203 * not in the correct address space). We have to calculate the offset. 204 * 205 * r1 = machine architecture number 206 * Returns: 207 * r3, r4, r6 corrupted 208 * r5 = mach_info pointer in physical address space 209 */ 210__lookup_machine_type: 211 adr r3, 4b 212 ldmia r3, {r4, r5, r6} 213 sub r3, r3, r4 @ get offset between virt&phys 214 add r5, r5, r3 @ convert virt addresses to 215 add r6, r6, r3 @ physical address space 2161: ldr r3, [r5, #MACHINFO_TYPE] @ get machine type 217 teq r3, r1 @ matches loader number? 218 beq 2f @ found 219 add r5, r5, #SIZEOF_MACHINE_DESC @ next machine_desc 220 cmp r5, r6 221 blo 1b 222 mov r5, #0 @ unknown machine 2232: mov pc, lr 224ENDPROC(__lookup_machine_type) 225 226/* 227 * This provides a C-API version of the above function. 228 */ 229ENTRY(lookup_machine_type) 230 stmfd sp!, {r4 - r6, lr} 231 mov r1, r0 232 bl __lookup_machine_type 233 mov r0, r5 234 ldmfd sp!, {r4 - r6, pc} 235ENDPROC(lookup_machine_type) 236 237/* Determine validity of the r2 atags pointer. The heuristic requires 238 * that the pointer be aligned, in the first 16k of physical RAM and 239 * that the ATAG_CORE marker is first and present. Future revisions 240 * of this function may be more lenient with the physical address and 241 * may also be able to move the ATAGS block if necessary. 242 * 243 * r8 = machinfo 244 * 245 * Returns: 246 * r2 either valid atags pointer, or zero 247 * r5, r6 corrupted 248 */ 249__vet_atags: 250 tst r2, #0x3 @ aligned? 251 bne 1f 252 253 ldr r5, [r2, #0] @ is first tag ATAG_CORE? 254 subs r5, r5, #ATAG_CORE_SIZE 255 bne 1f 256 ldr r5, [r2, #4] 257 ldr r6, =ATAG_CORE 258 cmp r5, r6 259 bne 1f 260 261 mov pc, lr @ atag pointer is ok 262 2631: mov r2, #0 264 mov pc, lr 265ENDPROC(__vet_atags) 266