xref: /openbmc/linux/arch/arm/kernel/debug.S (revision 63705da3)
1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *  linux/arch/arm/kernel/debug.S
4 *
5 *  Copyright (C) 1994-1999 Russell King
6 *
7 *  32-bit debugging code
8 */
9#include <linux/linkage.h>
10#include <asm/assembler.h>
11
12		.text
13
14/*
15 * Some debugging routines (useful if you've got MM problems and
16 * printk isn't working).  For DEBUGGING ONLY!!!  Do not leave
17 * references to these in a production kernel!
18 */
19
20#if !defined(CONFIG_DEBUG_SEMIHOSTING)
21#include CONFIG_DEBUG_LL_INCLUDE
22#endif
23
24#ifdef CONFIG_MMU
25		.macro	addruart_current, rx, tmp1, tmp2
26		addruart	\tmp1, \tmp2, \rx
27		mrc		p15, 0, \rx, c1, c0
28		tst		\rx, #1
29		moveq		\rx, \tmp1
30		movne		\rx, \tmp2
31		.endm
32
33#else /* !CONFIG_MMU */
34		.macro	addruart_current, rx, tmp1, tmp2
35		addruart	\rx, \tmp1, \tmp2
36		.endm
37
38#endif /* CONFIG_MMU */
39
40/*
41 * Useful debugging routines
42 */
43ENTRY(printhex8)
44		mov	r1, #8
45		b	printhex
46ENDPROC(printhex8)
47
48ENTRY(printhex4)
49		mov	r1, #4
50		b	printhex
51ENDPROC(printhex4)
52
53ENTRY(printhex2)
54		mov	r1, #2
55printhex:	adr	r2, hexbuf_rel
56		ldr	r3, [r2]
57		add	r2, r2, r3
58		add	r3, r2, r1
59		mov	r1, #0
60		strb	r1, [r3]
611:		and	r1, r0, #15
62		mov	r0, r0, lsr #4
63		cmp	r1, #10
64		addlt	r1, r1, #'0'
65		addge	r1, r1, #'a' - 10
66		strb	r1, [r3, #-1]!
67		teq	r3, r2
68		bne	1b
69		mov	r0, r2
70		b	printascii
71ENDPROC(printhex2)
72
73		.pushsection .bss
74hexbuf_addr:	.space 16
75		.popsection
76		.align
77hexbuf_rel:	.long	hexbuf_addr - .
78
79		.ltorg
80
81#ifndef CONFIG_DEBUG_SEMIHOSTING
82
83ENTRY(printascii)
84		addruart_current r3, r1, r2
851:		teq	r0, #0
86		ldrbne	r1, [r0], #1
87		teqne	r1, #0
88		reteq	lr
892:		teq     r1, #'\n'
90		bne	3f
91		mov	r1, #'\r'
92#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
93		waituartcts r2, r3
94#endif
95		waituarttxrdy r2, r3
96		senduart r1, r3
97		busyuart r2, r3
98		mov	r1, #'\n'
993:
100#ifdef CONFIG_DEBUG_UART_FLOW_CONTROL
101		waituartcts r2, r3
102#endif
103		waituarttxrdy r2, r3
104		senduart r1, r3
105		busyuart r2, r3
106		b	1b
107ENDPROC(printascii)
108
109ENTRY(printch)
110		addruart_current r3, r1, r2
111		mov	r1, r0
112		mov	r0, #0
113		b	2b
114ENDPROC(printch)
115
116#ifdef CONFIG_MMU
117ENTRY(debug_ll_addr)
118		addruart r2, r3, ip
119		str	r2, [r0]
120		str	r3, [r1]
121		ret	lr
122ENDPROC(debug_ll_addr)
123#endif
124
125#else
126
127ENTRY(printascii)
128		mov	r1, r0
129		mov	r0, #0x04		@ SYS_WRITE0
130	ARM(	svc	#0x123456	)
131#ifdef CONFIG_CPU_V7M
132	THUMB(	bkpt	#0xab		)
133#else
134	THUMB(	svc	#0xab		)
135#endif
136		ret	lr
137ENDPROC(printascii)
138
139ENTRY(printch)
140		adr	r1, hexbuf_rel
141		ldr	r2, [r1]
142		add	r1, r1, r2
143		strb	r0, [r1]
144		mov	r0, #0x03		@ SYS_WRITEC
145	ARM(	svc	#0x123456	)
146#ifdef CONFIG_CPU_V7M
147	THUMB(	bkpt	#0xab		)
148#else
149	THUMB(	svc	#0xab		)
150#endif
151		ret	lr
152ENDPROC(printch)
153
154ENTRY(debug_ll_addr)
155		mov	r2, #0
156		str	r2, [r0]
157		str	r2, [r1]
158		ret	lr
159ENDPROC(debug_ll_addr)
160
161#endif
162